Sandro Bartolini

2008
12	EE	Timothy M. Jones, Sandro Bartolini, Bruno De Bus, John Cavazos, Michael F. P. O'Boyle: Instruction Cache Energy Saving Through Compiler Way-Placement. DATE 2008: 1196-1201
11	EE	Sandro Bartolini, Irina Branovic, Roberto Giorgi, Enrico Martinelli: Effects of Instruction-Set Extensions on an Embedded Processor: A Case Study on Elliptic Curve Cryptography over GF(2/sup m/). IEEE Trans. Computers 57(5): 672-685 (2008)
2007
10	EE	Sandro Bartolini, Cinzia Castagnini, Enrico Martinelli: Inclusion of a Montgomery Multiplier Unit into an Embedded Processor’s Datapath to Speed-up Elliptic Curve Cryptography. IAS 2007: 95-100
2006
9	EE	Sandro Bartolini, Pierfrancesco Foglia, Cosimo Antonio Prete: Embedded processors and systems: Architectural issues and solutions for emerging applications. J. Embedded Computing 2(1): 1-3 (2006)
8	EE	Sandro Bartolini, Roberto Giorgi: Issues in Embedded Single-Chip Multicore Architectures. J. Embedded Computing 2(2): 137-139 (2006)
2005
7	EE	Sandro Bartolini, Cosimo Antonio Prete: Optimizing instruction cache performance of embedded systems. ACM Trans. Embedded Comput. Syst. 4(4): 934-965 (2005)
6	EE	Sandro Bartolini, Pierfrancesco Foglia, Cosimo Antonio Prete: Guests editor's introduction. SIGARCH Computer Architecture News 33(3): 1-2 (2005)
2004
5	EE	Sandro Bartolini, Irina Branovic, Roberto Giorgi, Enrico Martinelli: A Performance Evaluation of ARM ISA Extension for Elliptic Curve Cryptography over Binary Finite Fields. SBAC-PAD 2004: 238-245
4	EE	Sandro Bartolini, Cosimo Antonio Prete: A proposal for input-sensitivity analysis of profile-driven optimizations on embedded applications. SIGARCH Computer Architecture News 32(3): 70-77 (2004)
2002
3		Sandro Bartolini, Cosimo Antonio Prete: A cache-aware program transformation technique suitable for embedded systems. Information & Software Technology 44(13): 783-795 (2002)
2001
2	EE	Sandro Bartolini, Cosimo Antonio Prete: An Object Level Transformation Technique to Improve the Performance of Embedded Applications. SCAM 2001: 26-34
1	EE	Sandro Bartolini, Roberto Giorgi, Jelica Protic, Cosimo Antonio Prete, M. Valero: Parallel architecture and compilation techniques: selection of workshop papers, guests' editors introduction. SIGARCH Computer Architecture News 29(5): 9-12 (2001)

Coauthor Index

1	Irina Branovic	[5] [11]
2	Bruno De Bus	[12]
3	Cinzia Castagnini	[10]
4	John Cavazos	[12]
5	Pierfrancesco Foglia	[6] [9]
6	Roberto Giorgi	[1] [5] [8] [11]
7	Timothy M. Jones	[12]
8	Enrico Martinelli	[5] [10] [11]
9	Michael F. P. O'Boyle	[12]
10	Cosimo Antonio Prete	[1] [2] [3] [4] [6] [7] [9]
11	Jelica Protic	[1]
12	M. Valero	[1]

Colors in the list of coauthors