41. DAC 2004:
San Diego,
CA,
USA
Sharad Malik, Limor Fix, Andrew B. Kahng (Eds.):
Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004.
ACM 2004, ISBN 1-58113-828-8 BibTeX
Panel
Hot Leakage
- Arman Vassighi, Ali Keshavarzi, Siva Narendra, Gerhard Schrom, Yibin Ye, Seri Lee, Greg Chrysler, Manoj Sachdev, Vivek De:
Design optimizations for microprocessors at low temperature.
2-5
Electronic Edition (ACM DL) BibTeX
- Amit Agarwal, Chris H. Kim, Saibal Mukhopadhyay, Kaushik Roy:
Leakage in nano-scale technologies: mechanisms, impact and design considerations.
6-11
Electronic Edition (ACM DL) BibTeX
- Lei He, Weiping Liao, Mircea R. Stan:
System level leakage reduction considering the interdependence of temperature and leakage.
12-17
Electronic Edition (ACM DL) BibTeX
Clock Routing and Buffering
Tools and Strategies for Dynamic Verification
- Michael L. Behm, John M. Ludden, Yossi Lichtenstein, Michal Rimon, Michael Vinov:
Industrial experience with test generation languages for processor verification.
36-40
Electronic Edition (ACM DL) BibTeX
- Sigal Asaf, Eitan Marcus, Avi Ziv:
Defining coverage views to improve functional coverage analysis.
41-44
Electronic Edition (ACM DL) BibTeX
- Young-Su Kwon, Young-Il Kim, Chong-Min Kyung:
Systematic functional coverage metric synthesis from hierarchical temporal event relation graph.
45-48
Electronic Edition (ACM DL) BibTeX
- Shai Fine, Shmuel Ur, Avi Ziv:
Probabilistic regression suites for functional verification.
49-54
Electronic Edition (ACM DL) BibTeX
Timing-Driven System Synthesis
Reliable System-on-a-chip Design in the Nanometer Era
Panel
Power Modeling and Optimization for Embedded Systems
- Chun-Gi Lyuh, Taewhan Kim:
Memory access scheduling and binding considering energy minimization in multi-bank memory systems.
81-86
Electronic Edition (ACM DL) BibTeX
- Jaewon Seo, Taewhan Kim, Ki-Seok Chung:
Profile-based optimal intra-task voltage scheduling for hard real-time applications.
87-92
Electronic Edition (ACM DL) BibTeX
- Juan Antonio Carballo, Kevin J. Nowka, Seung-Moon Yoo, Ivan Vo, Clay Cranford, V. Robert Norman:
Requirement-based design methods for adaptive communications links.
93-98
Electronic Edition (ACM DL) BibTeX
- Anish Muttreja, Anand Raghunathan, Srivaths Ravi, Niraj K. Jha:
Automated energy/performance macromodeling of embedded software.
99-102
Electronic Edition (ACM DL) BibTeX
- Srinivasa R. Sridhara, Naresh R. Shanbhag:
Coding for system-on-chip networks: a unified framework.
103-106
Electronic Edition (ACM DL) BibTeX
Performance Evaluation and Run Time Support
Advances in Analog Circuit and Layout Synthesis
- Johan P. Vanderhaegen, Robert W. Brodersen:
Automated design of operational transconductance amplifiers using reversed geometric programming.
133-138
Electronic Edition (ACM DL) BibTeX
- Sambuddha Bhattacharya, Nuttorn Jangkrajarng, Roy Hartono, C.-J. Richard Shi:
Correct-by-construction layout-centric retargeting of large analog designs.
139-144
Electronic Edition (ACM DL) BibTeX
- Anuradha Agarwal, Hemanth Sampath, Veena Yelamanchili, Ranga Vemuri:
Fast and accurate parasitic capacitance models for layout-aware.
145-150
Electronic Edition (ACM DL) BibTeX
- Yang Xu, Lawrence T. Pileggi, Stephen P. Boyd:
ORACLE: optimization with recourse of analog circuits including layout extraction.
151-154
Electronic Edition (ACM DL) BibTeX
- Gang Zhang, E. Aykut Dengi, Ronald A. Rohrer, Rob A. Rutenbar, L. Richard Carley:
A synthesis flow toward fast parasitic closure for radio-frequency integrated circuits.
155-158
Electronic Edition (ACM DL) BibTeX
Power Grid Design and Analysis Techniques
- Kai Wang, Malgorzata Marek-Sadowska:
Buffer sizing for clock power minimization subject to general skew constraints.
159-164
Electronic Edition (ACM DL) BibTeX
- Min Zhao, Yuhong Fu, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda:
Optimal placement of power supply pads and pins.
165-170
Electronic Edition (ACM DL) BibTeX
- Sanjay Pant, David Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda:
A stochastic approach To power grid analysis.
171-176
Electronic Edition (ACM DL) BibTeX
- Su-Wei Wu, Yao-Wen Chang:
Efficient power/ground network analysis for power integrity-driven design methodology.
177-180
Electronic Edition (ACM DL) BibTeX
- Goeran Jerke, Jens Lienig, Jürgen Scheible:
Reliability-driven layout decompaction for electromigration failure avoidance in complex mixed-signal IC designs.
181-184
Electronic Edition (ACM DL) BibTeX
Panel
Methods for A Priori Feasible Layout Generation
Abstraction Techniques for Functional Verification
Memory and Network Optimization in Embedded Designs
- Francesco Poletti, Paul Marchal, David Atienza, Luca Benini, Francky Catthoor, Jose Manuel Mendias:
An integrated hardware/software approach for run-time scratchpad management.
238-243
Electronic Edition (ACM DL) BibTeX
- Eduardo Wanderley Netto, Rodolfo Azevedo, Paulo Centoducatte, Guido Araujo:
Multi-profile based code compression.
244-249
Electronic Edition (ACM DL) BibTeX
- Sang-Il Han, Amer Baghdadi, Marius Bonaciu, Soo-Ik Chae, Ahmed Amine Jerraya:
An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory.
250-255
Electronic Edition (ACM DL) BibTeX
- Vincent Nollet, Théodore Marescaux, Diederik Verkest, Jean-Yves Mignolet, Serge Vernalde:
Operating-system controlled network on chip.
256-259
Electronic Edition (ACM DL) BibTeX
- Jingcao Hu, Radu Marculescu:
DyAD: smart routing for networks-on-chip.
260-263
Electronic Edition (ACM DL) BibTeX
Business Day Session
The Future of Timing Closure
Panel
Design Space Exploration and Scheduling for Embedded Software
Advances in Accelerated Simulation
- Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong-Min Kyung:
Communication-efficient hardware acceleration for fast functional simulation.
293-298
Electronic Edition (ACM DL) BibTeX
- Yuichi Nakamura, Kohei Hosokawa, Ichiro Kuroda, Ko Yoshikawa, Takeshi Yoshimura:
A fast hardware/software co-verification method for system-on-a-chip by using a C/C++ simulator and FPGA emulator with shared register communication.
299-304
Electronic Edition (ACM DL) BibTeX
- Seokwoo Lee, Shidhartha Das, Valeria Bertacco, Todd M. Austin, David Blaauw, Trevor N. Mudge:
Circuit-aware architectural simulation.
305-310
Electronic Edition (ACM DL) BibTeX
Design for Manufacturing
Statistical Timing Analysis
Panel
New Ideas in Placement
- Zhong Xiu, James D. Z. Ma, Suzanne M. Fowler, Rob A. Rutenbar:
Large-scale placement by grid-warping.
351-356
Electronic Edition (ACM DL) BibTeX
- Andrew B. Kahng, Sherief Reda:
Placement feedback: a concept and method for better min-cut placements.
357-362
Electronic Edition (ACM DL) BibTeX
- Dominic A. Antonelli, Danny Z. Chen, Timothy J. Dysart, Xiaobo Sharon Hu, Andrew B. Kahng, Peter M. Kogge, Richard C. Murphy, Michael T. Niemier:
Quantum-Dot Cellular Automata (QCA) circuit partitioning: problem modeling and solutions.
363-368
Electronic Edition (ACM DL) BibTeX
Model Order Reduction and Variational Techniques for Parasitic Analysis
- Ngai Wong, Venkataramanan Balakrishnan, Cheng-Kok Koh:
Passivity-preserving model reduction via a computationally efficient project-and-balance scheme.
369-374
Electronic Edition (ACM DL) BibTeX
- Janet Meiling Wang, Omar Hafiz, Jun Li:
A linear fractional transform (LFT) based model for interconnect parametric uncertainty.
375-380
Electronic Edition (ACM DL) BibTeX
- Kanak Agarwal, Dennis Sylvester, David Blaauw, Frank Liu, Sani R. Nassif, Sarma B. K. Vrudhula:
Variational delay metrics for interconnect timing analysis.
381-384
Electronic Edition (ACM DL) BibTeX
- Luis Miguel Silveira, Joel R. Phillips:
Exploiting input information in a model reduction algorithm for massively coupled parasitic networks.
385-388
Electronic Edition (ACM DL) BibTeX
Compilation Techniques for Embedded Applications
Platform-based System Design
Innovations in Logic Synthesis
Yield Estimation and Optimization
High-level Techniques for Signal Processing
Advanced Test Solutions
- Li-C. Wang, T. M. Mak, Kwang-Ting Cheng, Magdy S. Abadir:
On path-based learning and its applications in delay test and diagnosis.
492-497
Electronic Edition (ACM DL) BibTeX
- Vinay Verma, Shantanu Dutt, Vishal Suthar:
Efficient on-line testing of FPGAs with provable diagnosabilities.
498-503
Electronic Edition (ACM DL) BibTeX
- Wei Li, Sudhakar M. Reddy, Irith Pomeranz:
On test generation for transition faults with minimized peak power dissipation.
504-509
Electronic Edition (ACM DL) BibTeX
- Sungju Park, Sangwook Cho, Seiyang Yang, Maciej J. Ciesielski:
A new state assignment technique for testing and low power.
510-513
Electronic Edition (ACM DL) BibTeX
- Bart Vermeulen, Mohammad Zalfany Urfianto, Sandeep Kumar Goel:
Automatic generation of breakpoint hardware for silicon debug.
514-517
Electronic Edition (ACM DL) BibTeX
Panel
Advances in Boolean Analysis Techniques
- Yoonna Oh, Maher N. Mneimneh, Zaher S. Andraus, Karem A. Sakallah, Igor L. Markov:
AMUSE: a minimally-unsatisfiable subformula extractor.
518-523
Electronic Edition (ACM DL) BibTeX
- Pankaj Chauhan, Edmund M. Clarke, Daniel Kroening:
A SAT-based algorithm for reparameterization in symbolic simulation.
524-529
Electronic Edition (ACM DL) BibTeX
- Paul T. Darga, Mark H. Liffiton, Karem A. Sakallah, Igor L. Markov:
Exploiting structure in symmetry detection for CNF.
530-534
Electronic Edition (ACM DL) BibTeX
- Chao Wang, HoonSang Jin, Gary D. Hachtel, Fabio Somenzi:
Refining the SAT decision ordering for bounded model checking.
535-538
Electronic Edition (ACM DL) BibTeX
- Demos Anastasakis, Lisa McIlwain, Slawomir Pilarski:
Efficient equivalence checking with partitions and hierarchical cut-points.
539-542
Electronic Edition (ACM DL) BibTeX
Panel
Power Optimization for Real-Time and Media-Rich Embedded Systems
- Kihwan Choi, Ramakrishna Soma, Massoud Pedram:
Off-chip latency-driven dynamic voltage and frequency scaling for an MPEG decoding.
544-549
Electronic Edition (ACM DL) BibTeX
- Ying Zhang, Robert P. Dick, Krishnendu Chakrabarty:
Energy-aware deterministic fault tolerance in distributed real-time embedded systems.
550-555
Electronic Edition (ACM DL) BibTeX
- Arun Kejariwal, Sumit Gupta, Alexandru Nicolau, Nikil Dutt, Rajesh Gupta:
Proxy-based task partitioning of watermarking algorithms for reducing energy consumption in mobile devices.
556-561
Electronic Edition (ACM DL) BibTeX
- Xiaoping Hu, Radu Marculescu:
Adaptive data partitioning for ambient multimedia.
562-565
Electronic Edition (ACM DL) BibTeX
- Siddharth Choudhuri, Rabi N. Mahapatra:
Energy characterization of filesystems for diskless embedded systems.
566-569
Electronic Edition (ACM DL) BibTeX
Latency Tolerance and Asynchronous Design
New Technologies in System Design
- Margarida F. Jacome, Chen He, Gustavo de Veciana, Stephen Bijansky:
Defect tolerant probabilistic design paradigm for nanotechnologies.
596-601
Electronic Edition (ACM DL) BibTeX
- Jason Cong, Yiping Fan, Zhiru Zhang:
Architecture-level synthesis for automatic interconnect pipelining.
602-607
Electronic Edition (ACM DL) BibTeX
- Samar Abdi, Daniel Gajski:
Automatic generation of equivalent architecture model from functional specification.
608-613
Electronic Edition (ACM DL) BibTeX
- Bo Yang, Ramesh Karri, David A. McGrew:
Divide-and-concatenate: an architecture level optimization technique for universal hash functions.
614-617
Electronic Edition (ACM DL) BibTeX
- Massimo Conti, Marco Caldari, Giovanni B. Vece, Simone Orcioni, Claudio Turchetti:
Performance analysis of different arbitration algorithms of the AMBA AHB bus.
618-621
Electronic Edition (ACM DL) BibTeX
BioMEMS
Panel
Floorplanning
- Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watewai, Hsien-Hsin S. Lee, Sung Kyu Lim:
Profile-guided microarchitectural floorplanning for deep submicron processor design.
634-639
Electronic Edition (ACM DL) BibTeX
- Changbo Long, Lucanus J. Simonson, Weiping Liao, Lei He:
Floorplanning optimization with trajectory piecewise-linear model for pipelined interconnects.
640-645
Electronic Edition (ACM DL) BibTeX
- Jing Li, Tan Yan, Bo Yang, Juebang Yu, Chunhui Li:
A packing algorithm for non-manhattan hexagon/triangle placement design by using an adaptive o-tree representation.
646-651
Electronic Edition (ACM DL) BibTeX
Issues in Timing Analysis
ISSCC Highlights
- Joachim G. Clabes, Joshua Friedrich, Mark Sweet, Jack DiLullo, Sam Chu, Donald W. Plass, James Dawson, Paul Muench, Larry Powell, Michael S. Floyd, Balaram Sinharoy, Mike Lee, Michael Goulet, James Wagoner, Nicole S. Schwartz, Stephen L. Runyon, Gary Gorman, Phillip Restle, Ronald N. Kalla, Joseph McGill, Steve Dodson:
Design and implementation of the POWER5 microprocessor.
670-672
Electronic Edition (ACM DL) BibTeX
- Toshinari Takayanagi, Jinuk Luke Shin, Bruce Petrick, Jeffrey Su, Ana Sonia Leon:
A dual-core 64b ultraSPARC microprocessor for dense server applications.
673-677
Electronic Edition (ACM DL) BibTeX
- Daniel J. Deleganes, Micah Barany, George Geannopoulos, Kurt Kreitzer, Anant P. Singh, Sapumal Wijeratne:
Low voltage swing logic circuits for a Pentium 4 processor integer core.
678-680
Electronic Edition (ACM DL) BibTeX
Multiprocessor SoC MPSoC Solutions/Nightmare
Timing Issues in Placement
Design Methodologies for ASIPs
- Gunnar Braun, Achim Nohl, Weihua Sheng, Jianjiang Ceng, Manuel Hohenauer, Hanno Scharwächter, Rainer Leupers, Heinrich Meyr:
A novel approach for flexible and consistent ADL-driven ASIP design.
717-722
Electronic Edition (ACM DL) BibTeX
- Pan Yu, Tulika Mitra:
Characterizing embedded applications for instruction-set extensible processors.
723-728
Electronic Edition (ACM DL) BibTeX
- Partha Biswas, Vinay Choudhary, Kubilay Atasu, Laura Pozzi, Paolo Ienne, Nikil Dutt:
Introduction of local memory elements in instruction set extensions.
729-734
Electronic Edition (ACM DL) BibTeX
FPGA-Based Systems
Security as a New Dimension in Embedded System Design
Leakage Power Optimization
- Anup Kumar Sultania, Dennis Sylvester, Sachin S. Sapatnekar:
Tradeoffs between date oxide leakage and delay for dual Tox circuits.
761-766
Electronic Edition (ACM DL) BibTeX
- Kaviraj Chopra, Sarma B. K. Vrudhula:
Implicit pseudo boolean enumeration algorithms for input vector control.
767-772
Electronic Edition (ACM DL) BibTeX
- Ashish Srivastava, Dennis Sylvester, David Blaauw:
Statistical optimization of leakage power considering process variations using dual-Vth and sizing.
773-778
Electronic Edition (ACM DL) BibTeX
- Harmander Deogun, Rajeev R. Rao, Dennis Sylvester, David Blaauw:
Leakage-and crosstalk-aware bus encoding for total power reduction.
779-782
Electronic Edition (ACM DL) BibTeX
- Ashish Srivastava, Dennis Sylvester, David Blaauw:
Power minimization using simultaneous gate sizing, dual-Vdd and dual-Vth assignment.
783-787
Electronic Edition (ACM DL) BibTeX
Interconnect Extraction
New Frontiers in Logic Synthesis
- Shih-Chieh Chang, Cheng-Tao Hsieh, Kai-Chiang Wu:
Re-synthesis for delay variation tolerance.
814-819
Electronic Edition (ACM DL) BibTeX
- Aiqun Cao, Cheng-Kok Koh:
Post-layout logic optimization of domino circuits.
820-825
Electronic Edition (ACM DL) BibTeX
- Peter Tummeltshammer, James C. Hoe, Markus Püschel:
Multiple constant multiplication by time-multiplexed mapping of addition chains.
826-829
Electronic Edition (ACM DL) BibTeX
- Hemangee K. Kapoor, Mark B. Josephs:
Decomposing specifications with concurrent outputs to resolve state coding conflicts in asynchronous logic synthesis.
830-833
Electronic Edition (ACM DL) BibTeX
- Pawel Kerntopf:
A new heuristic algorithm for reversible logic synthesis.
834-837
Electronic Edition (ACM DL) BibTeX
- William N. N. Hung, Xiaoyu Song, Guowu Yang, Jin Yang, Marek A. Perkowski:
Quantum logic synthesis by symbolic reachability analysis.
838-841
Electronic Edition (ACM DL) BibTeX
Numerical Techniques for Simulation
- Xin Li, Yang Xu, Peng Li, Padmini Gopalakrishnan, Lawrence T. Pileggi:
A frequency relaxation approach for analog/RF system-level simulation.
842-847
Electronic Edition (ACM DL) BibTeX
- Ting Mei, Jaijeet S. Roychowdhury, Todd S. Coffey, Scott A. Hutchinson, David M. Day:
Robust, stable time-domain methods for solving MPDEs of fast/slow systems.
848-853
Electronic Edition (ACM DL) BibTeX
- Geert Van der Plas, Mustafa Badaroglu, Gerd Vandersteen, Petr Dobrovolný, Piet Wambacq, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man:
High-level simulation of substrate noise in high-ohmic substrates with interconnect and supply effects.
854-859
Electronic Edition (ACM DL) BibTeX
- Sheldon X.-D. Tan, Weikun Guo, Zhenyu Qi:
Hierarchical approach to exact symbolic analysis of large analog circuits.
860-863
Electronic Edition (ACM DL) BibTeX
- Baolin Yang, Bruce McGaughy:
An Essentially Non-Oscillatory (ENO) high-order accurate Adaptive table model for device modeling.
864-867
Electronic Edition (ACM DL) BibTeX
Energy and Thermal-Aware Design
- Bo Zhai, David Blaauw, Dennis Sylvester, Krisztián Flautner:
Theoretical and practical limits of dynamic voltage scaling.
868-873
Electronic Edition (ACM DL) BibTeX
- R. Reed Taylor, Herman Schmit:
Enabling energy efficiency in via-patterned gate array devices.
874-878
Electronic Edition (ACM DL) BibTeX
- Wei Huang, Mircea R. Stan, Kevin Skadron, Karthik Sankaranarayanan, Shougata Ghosh, Sivakumar Velusamy:
Compact thermal modeling for temperature-aware design.
878-883
Electronic Edition (ACM DL) BibTeX
- Anirban Basu, Sheng-Chih Lin, Vineet Wason, Amit Mehrotra, Kaustav Banerjee:
Simultaneous optimization of supply and threshold voltages for low-power and high-performance circuits in the leakage dominant era.
884-887
Electronic Edition (ACM DL) BibTeX
Noise-Tolerant Design and Analysis Techniques
New Tools and Methods for Future Embedded SoC
New Scan-Based Test Techniques
CAD for Reconfigurable Computing
Copyright © Sat May 16 23:04:38 2009
by Michael Ley (ley@uni-trier.de)
