2008 |
13 | EE | Arun V. Sathanur,
Ritochit Chakraborty,
Vikram Jandhyala:
Accurate statistical analysis of a differential low noise amplifier using a combined SPICE-field solver approach.
ISCAS 2008: 884-887 |
2007 |
12 | EE | Arun V. Sathanur,
Ritochit Chakraborty,
Vikram Jandhyala:
Statistical analysis of RF circuits using combined circuit simulator-full wave field solver approach.
ICCAD 2007: 11-17 |
11 | EE | Dipanjan Gope,
Albert E. Ruehli,
Vikram Jandhyala:
Speeding Up PEEC Partial Inductance Computations Using a QR-Based Algorithm.
IEEE Trans. VLSI Syst. 15(1): 60-68 (2007) |
2006 |
10 | EE | Chuanyi Yang,
Swagato Chakraborty,
Dipanjan Gope,
Vikram Jandhyala:
A parallel low-rank multilevel matrix compression algorithm for parasitic extraction of electrically large structures.
DAC 2006: 1053-1056 |
9 | EE | Hao Gang Wang,
Chi Hou Chan,
Leung Tsang,
Vikram Jandhyala:
On sampling algorithms in multilevel QR factorization method for magnetoquasistatic analysis of integrated circuits over multilayered lossy substrates.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1777-1792 (2006) |
2005 |
8 | EE | Dipanjan Gope,
Indranil Chowdhury,
Vikram Jandhyala:
DiMES: multilevel fast direct solver based on multipole expansions for parasitic extraction of massively coupled 3D microelectronic structures.
DAC 2005: 159-162 |
7 | EE | Vikram Jandhyala,
Yasuo Kuga,
David J. Allstot,
C.-J. Richard Shi:
Bridging Circuits and Electromagnetics in a Curriculum Aimed at Microelectronic Analog and Microwave Simulation and Design.
MSE 2005: 45-46 |
6 | EE | Indranil Chowdhury,
Vikram Jandhyala:
Multilevel multipole and local operators for potentials of the form r-lambda.
Appl. Math. Lett. 18(10): 1184-1189 (2005) |
2004 |
5 | EE | Dipanjan Gope,
Swagato Chakraborty,
Vikram Jandhyala:
A fast parasitic extractor based on low-rank multilevel matrix compression for conductor and dielectric modeling in microelectronics and MEMS.
DAC 2004: 794-799 |
4 | EE | Pavel V. Nikitin,
Vikram Jandhyala,
Daniel White,
Nathan Champagne,
John D. Rockway,
C.-J. Richard Shi,
Chuanyi Yang,
Yong Wang,
Gong Ouyang,
Rob Sharpe,
John W. Rockway:
Modeling and Simulation of Circuit-Electromagnetic Effects in Electronic Design Flow.
ISQED 2004: 244-249 |
3 | EE | Dipanjan Gope,
Vikram Jandhyala:
Oct-tree-based multilevel low-rank decomposition algorithm for rapid 3-D parasitic extraction.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(11): 1575-1580 (2004) |
2002 |
2 | EE | Vikram Jandhyala,
Yong Wang,
Dipanjan Gope,
C.-J. Richard Shi:
Coupled Electromagnetic-Circuit Simulation of Arbitrarily-Shaped Conducting Structures Using Triangular Meshes.
ISQED 2002: 38-42 |
1999 |
1 | EE | Vikram Jandhyala,
Scott Savage,
J. Eric Bracken,
Zoltan J. Cendes:
Efficient Capacitance Computation for Structures with Non-Uniform Adaptive Surface Meshes.
DAC 1999: 543-548 |