2008 |
54 | EE | Dae Hyun Kim,
Sung Kyu Lim:
Bus-aware microarchitectural floorplanning.
ASP-DAC 2008: 204-208 |
53 | EE | Jacob R. Minz,
Xin Zhao,
Sung Kyu Lim:
Buffered clock tree synthesis for 3D ICs under thermal variations.
ASP-DAC 2008: 504-509 |
52 | EE | Michael B. Healy,
Fayez Mohamood,
Hsien-Hsin S. Lee,
Sung Kyu Lim:
A unified methodology for power supply noise reduction in modern microarchitecture design.
ASP-DAC 2008: 611-616 |
51 | EE | Dae Hyun Kim,
Sung Kyu Lim:
Global bus route optimization with application to microarchitectural design exploration.
ICCD 2008: 658-663 |
2007 |
50 | EE | Mongkol Ekpanyapong,
Xin Zhao,
Sung Kyu Lim:
An Efficient Computation of Statistically Critical Sequential Paths Under Retiming.
ASP-DAC 2007: 547-552 |
49 | EE | Fayez Mohamood,
Michael B. Healy,
Sung Kyu Lim,
Hsien-Hsin S. Lee:
Noise-Direct: A Technique for Power Supply Noise Aware Floorplanning Using Microarchitecture Profiling.
ASP-DAC 2007: 786-791 |
48 | EE | I. Faik Baskaya,
Brian Gestner,
Christopher M. Twigg,
Sung Kyu Lim,
David V. Anderson,
Paul E. Hasler:
Rapid Prototyping of Large-scale Analog Circuits With Field Programmable Analog Array.
FCCM 2007: 319-320 |
47 | EE | Mohit Pathak,
Sung Kyu Lim:
Thermal-aware Steiner routing for 3D stacked ICs.
ICCAD 2007: 205-211 |
46 | EE | Eric Wong,
Sung Kyu Lim:
Whitespace redistribution for thermal via insertion in 3D stacked ICs.
ICCD 2007: 267-272 |
45 | EE | Mohit Pathak,
Souvik Mukherjee,
Madhavan Swaminathan,
Ege Engin,
Sung Kyu Lim:
Placement and routing of RF embedded passive designs in LCP substrate.
ICCD 2007: 273-279 |
44 | EE | Sung Kyu Lim,
Massoud Pedram:
Introduction to special issue on demonstrable software systems and hardware platforms.
ACM Trans. Design Autom. Electr. Syst. 12(3): (2007) |
43 | EE | Michael B. Healy,
Mario Vittes,
Mongkol Ekpanyapong,
Chinnakrishnan S. Ballapuram,
Sung Kyu Lim,
Hsien-Hsin S. Lee,
Gabriel H. Loh:
Multiobjective Microarchitectural Floorplanning for 2-D and 3-D ICs.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(1): 38-52 (2007) |
42 | EE | Eric Wong,
Jacob R. Minz,
Sung Kyu Lim:
Decoupling-Capacitor Planning and Sizing for Noise and Leakage Reduction.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(11): 2023-2034 (2007) |
2006 |
41 | EE | Mongkol Ekpanyapong,
Thaisiri Watewai,
Sung Kyu Lim:
Statistical Bellman-Ford algorithm with an application to retiming.
ASP-DAC 2006: 959-964 |
40 | EE | Michael B. Healy,
Mario Vittes,
Mongkol Ekpanyapong,
Chinnakrishnan S. Ballapuram,
Sung Kyu Lim,
Hsien-Hsin S. Lee,
Gabriel H. Loh:
Microarchitectural floorplanning under performance and thermal tradeoff.
DATE 2006: 1288-1293 |
39 | EE | Jacob R. Minz,
Somaskanda Thyagaraja,
Sung Kyu Lim:
Optical routing for 3D system-on-package.
DATE 2006: 337-338 |
38 | EE | Eric Wong,
Sung Kyu Lim:
3D floorplanning with thermal vias.
DATE 2006: 878-883 |
37 | EE | Eric Wong,
Jacob R. Minz,
Sung Kyu Lim:
Decoupling capacitor planning and sizing for noise and leakage reduction.
ICCAD 2006: 395-400 |
36 | EE | Mongkol Ekpanyapong,
Sung Kyu Lim:
Integrated retiming and simultaneous Vdd/Vth scaling for total power minimization.
ISPD 2006: 142-148 |
35 | EE | Fayez Mohamood,
Michael B. Healy,
Sung Kyu Lim,
Hsien-Hsin S. Lee:
A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design.
MICRO 2006: 3-14 |
34 | EE | Eric Wong,
Jacob R. Minz,
Sung Kyu Lim:
Multi-Objective Module Placement For 3-D System-On-Package.
IEEE Trans. VLSI Syst. 14(5): 553-557 (2006) |
33 | EE | I. Faik Baskaya,
Sasank Reddy,
Sung Kyu Lim,
David V. Anderson:
Placement for large-scale floating-gate field-programable analog arrays.
IEEE Trans. VLSI Syst. 14(8): 906-910 (2006) |
32 | EE | Jacob R. Minz,
Sung Kyu Lim:
Block-level 3-D Global Routing With an Application to 3-D Packaging.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2248-2257 (2006) |
31 | EE | Mongkol Ekpanyapong,
Michael B. Healy,
Sung Kyu Lim:
Profile-Driven Instruction Mapping for Dataflow Architectures.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(12): 3017-3025 (2006) |
30 | EE | Peter G. Sassone,
Sung Kyu Lim:
Traffic: a novel geometric algorithm for fast wire-optimized floorplanning.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(6): 1075-1086 (2006) |
29 | EE | Mongkol Ekpanyapong,
Jacob R. Minz,
Thaisiri Watewai,
Hsien-Hsin S. Lee,
Sung Kyu Lim:
Profile-guided microarchitectural floor planning for deep submicron processor design.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(7): 1289-1300 (2006) |
2005 |
28 | EE | Brian Stephen Smith,
Sung Kyu Lim:
QCA channel routing with wire crossing minimization.
ACM Great Lakes Symposium on VLSI 2005: 217-220 |
27 | EE | Jacob R. Minz,
Sung Kyu Lim,
Cheng-Kok Koh:
3D module placement for congestion and power noise reduction.
ACM Great Lakes Symposium on VLSI 2005: 458-461 |
26 | EE | Mongkol Ekpanyapong,
Michael B. Healy,
Sung Kyu Lim:
Placement for configurable dataflow architecture.
ASP-DAC 2005: 1127-1130 |
25 | EE | Karthik Balakrishnan,
Vidit Nanda,
Siddharth Easwar,
Sung Kyu Lim:
Wire congestion and thermal aware 3D global placement.
ASP-DAC 2005: 1131-1134 |
24 | EE | Ramprasad Ravichandran,
Michael T. Niemier,
Sung Kyu Lim:
Partitioning and placement for buildable QCA circuits.
ASP-DAC 2005: 424-427 |
23 | | I. Faik Baskaya,
Sasank Reddy,
Sung Kyu Lim,
David V. Anderson:
Hierarchical Placement for Large-scale FPAA.
FPL 2005: 421-426 |
22 | | Michael B. Healy,
Mongkol Ekpanyapong,
Sung Kyu Lim:
MILP-based Placement and Routing for Dataflow Architecture.
FPL 2005: 71-76 |
21 | EE | Mongkol Ekpanyapong,
Chinnakrishnan S. Ballapuram,
Sung Kyu Lim,
Hsien-Hsin S. Lee:
Wire-driven microarchitectural design space exploration.
ISCAS (2) 2005: 1867-1870 |
20 | EE | I. Faik Baskaya,
Sasank Reddy,
Sung Kyu Lim,
Tyson S. Hall,
David V. Anderson:
Mapping algorithm for large-scale field programmable analog array.
ISPD 2005: 152-158 |
19 | EE | Sung Kyu Lim:
Physical Design for 3D System on Package.
IEEE Design & Test of Computers 22(6): 532-539 (2005) |
18 | EE | Ramprasad Ravichandran,
Sung Kyu Lim,
Michael T. Niemier:
Automatic cell placement for quantum-dot cellular automata.
Integration 38(3): 541-548 (2005) |
17 | EE | Sung Kyu Lim,
Ramprasad Ravichandran,
Michael T. Niemier:
Partitioning and placement for buildable QCA circuits.
JETC 1(1): 50-72 (2005) |
2004 |
16 | EE | Ramprasad Ravichandran,
Nihal Ladiwala,
Jean Nguyen,
Michael T. Niemier,
Sung Kyu Lim:
Automatic cell placement for quantum-dot cellular automata.
ACM Great Lakes Symposium on VLSI 2004: 332-337 |
15 | EE | Mongkol Ekpanyapong,
Sung Kyu Lim:
Performance-driven global placement via adaptive network characterization.
ASP-DAC 2004: 137-142 |
14 | EE | Jacob R. Minz,
Sung Kyu Lim:
Layer assignment for reliable system-on-package.
ASP-DAC 2004: 31-37 |
13 | EE | Mongkol Ekpanyapong,
Jacob R. Minz,
Thaisiri Watewai,
Hsien-Hsin S. Lee,
Sung Kyu Lim:
Profile-guided microarchitectural floorplanning for deep submicron processor design.
DAC 2004: 634-639 |
12 | EE | Jacob R. Minz,
Mohit Pathak,
Sung Kyu Lim:
Net and Pin Distribution for 3D Package Global Routing.
DATE 2004: 1410-1411 |
11 | | Mongkol Ekpanyapong,
Karthik Balakrishnan,
Vidit Nanda,
Sung Kyu Lim:
Simultaneous delay and power optimization in global placement.
ISCAS (5) 2004: 57-60 |
10 | | Pun Hang Shiu,
Ramprasad Ravichandran,
Siddharth Easwar,
Sung Kyu Lim:
Multi-layer floorplanning for reliable system-on-package.
ISCAS (5) 2004: 69-72 |
9 | EE | Jason Cong,
Sung Kyu Lim:
Retiming-based timing analysis with an application to mincut-based global placement.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(12): 1684-1692 (2004) |
8 | EE | Jason Cong,
Sung Kyu Lim:
Edge separability-based circuit clustering with application to multilevel circuit partitioning.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(3): 346-357 (2004) |
2003 |
7 | EE | Peter G. Sassone,
Sung Kyu Lim:
A Novel Geometric Algorithm for Fast Wire-Optimized Floorplanning.
ICCAD 2003: 74-80 |
2000 |
6 | EE | Jason Cong,
Sung Kyu Lim:
Edge separability based circuit clustering with application to circuit partitioning.
ASP-DAC 2000: 429-434 |
5 | EE | Jason Cong,
Sung Kyu Lim:
Performance driven multiway partitioning.
ASP-DAC 2000: 441-446 |
4 | EE | Jason Cong,
Sung Kyu Lim,
Chang Wu:
Performance driven multi-level and multiway partitioning with retiming.
DAC 2000: 274-279 |
3 | | Jason Cong,
Sung Kyu Lim:
Physical Planning with Retiming.
ICCAD 2000: 2-7 |
1998 |
2 | EE | Jason Cong,
Sung Kyu Lim:
Multiway partitioning with pairwise movement.
ICCAD 1998: 512-516 |
1997 |
1 | EE | Jason Cong,
Honching Peter Li,
Sung Kyu Lim,
Toshiyuki Shibuya,
Dongmin Xu:
Large scale circuit partitioning with loose/stable net removal and signal flow based clustering.
ICCAD 1997: 441-446 |