| 2008 |
|---|
| 10 | EE | Aditya Bansal,
Rama N. Singh,
Saibal Mukhopadhyay,
Geng Han,
Fook-Luen Heng,
Ching-Te Chuang:
Pre-Si estimation and compensation of SRAM layout deficiencies to achieve target performance and yield.
ICCD 2008: 457-462 |
| 2005 |
|---|
| 9 | EE | Chung-Kuan Cheng,
Steve Lin,
Andrew B. Kahng,
Keh-Jeng Chang,
Vijay Pitchumani,
Toshiyuki Shibuya,
Roberto Suaya,
Zhiping Yu,
Fook-Luen Heng,
Don MacMillen:
Panel I: who is responsible for the design for manufacturability issues in the era of nano-technologies?
ASP-DAC 2005 |
| 8 | EE | Xin Yuan,
Kevin W. McCullen,
Fook-Luen Heng,
Robert F. Walker,
Jason Hibbeler,
Robert J. Allen,
Rani R. Narayan:
Technology migration technique for designs with strong RET-driven layout restrictions.
ISPD 2005: 175-182 |
| 2004 |
|---|
| 7 | EE | Alexey Lvov,
Fook-Luen Heng:
A graph based simplex method for the integer minimum perturbation problem with sum and difference constraints.
ACM Great Lakes Symposium on VLSI 2004: 67-72 |
| 6 | EE | Puneet Gupta,
Fook-Luen Heng:
Toward a systematic-variation aware timing methodology.
DAC 2004: 321-326 |
| 5 | EE | Mark A. Lavin,
Fook-Luen Heng,
Gregory A. Northrop:
Backend CAD flows for "restrictive design rules".
ICCAD 2004: 739-746 |
| 2001 |
|---|
| 4 | EE | Lars Liebmann,
Jennifer Lund,
Fook-Luen Heng,
Ioana Graur:
Enabling Alternating Phase Shifted Mask Designs for a Full Logic Gate Level: Design Rules and Design Rule Checking.
DAC 2001: 79-84 |
| 3 | EE | Fook-Luen Heng,
Lars Liebmann,
Jennifer Lund:
Application of automated design migration to alternating phase shift mask design.
ISPD 2001: 38-43 |
| 1998 |
|---|
| 2 | EE | Zhan Chen,
Fook-Luen Heng:
A Fast Minimum Layout Perturbation Algorithm for Electromigration Reliability Enhancement.
DFT 1998: 56-63 |
| 1997 |
|---|
| 1 | EE | Fook-Luen Heng,
Zhan Chen,
Gustavo E. Téllez:
A VLSI artwork legalization technique based on a new criterion of minimum layout perturbation.
ISPD 1997: 116-121 |
