2009 | ||
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51 | EE | Ramkumar Jayaseelan, Tulika Mitra: Temperature Aware Scheduling for Embedded Processors. VLSI Design 2009: 541-546 |
2008 | ||
50 | EE | Yun Liang, Tulika Mitra: Static analysis for fast and accurate design space exploration of caches. CODES+ISSS 2008: 103-108 |
49 | EE | Yun Liang, Lei Ju, Samarjit Chakraborty, Tulika Mitra, Abhik Roychoudhury: Cache-aware optimization of BAN applications. CODES+ISSS 2008: 149-154 |
48 | EE | Vivy Suhendra, Abhik Roychoudhury, Tulika Mitra: Scratchpad allocation for concurrent embedded software. CODES+ISSS 2008: 37-42 |
47 | EE | Vivy Suhendra, Tulika Mitra: Exploring locking & partitioning for predictable shared caches on multi-cores. DAC 2008: 300-303 |
46 | EE | Yun Liang, Tulika Mitra: Cache modeling in probabilistic execution time analysis. DAC 2008: 319-324 |
45 | EE | Ramkumar Jayaseelan, Tulika Mitra: Temperature aware task sequencing and voltage scaling. ICCAD 2008: 618-623 |
44 | EE | Reinhard Wilhelm, Jakob Engblom, Andreas Ermedahl, Niklas Holsti, Stephan Thesing, David B. Whalley, Guillem Bernat, Christian Ferdinand, Reinhold Heckmann, Tulika Mitra, Frank Mueller, Isabelle Puaut, Peter P. Puschner, Jan Staschulat, Per Stenström: The worst-case execution-time problem - overview of methods and survey of tools. ACM Trans. Embedded Comput. Syst. 7(3): (2008) |
2007 | ||
43 | EE | Xianfeng Li, Abhik Roychoudhury, Tulika Mitra, Prabhat Mishra, Xu Cheng: A Retargetable Software Timing Analyzer Using Architecture Description Language. ASP-DAC 2007: 396-401 |
42 | EE | Huynh Phung Huynh, Joon Edward Sim, Tulika Mitra: An efficient framework for dynamic reconfiguration of instruction-set customization. CASES 2007: 135-144 |
41 | EE | Huynh Phung Huynh, Tulika Mitra: Instruction-set customization for real-time embedded systems. DATE 2007: 1472-1477 |
40 | EE | Samarjit Chakraborty, Tulika Mitra, Abhik Roychoudhury, Lothar Thiele, Unmesh D. Bordoloi, Cem Derdiyok: Cache-Aware Timing Analysis of Streaming Applications. ECRTS 2007: 159-168 |
39 | EE | Pan Yu, Tulika Mitra: Disjoint Pattern Enumeration for Custom Instructions Identification. FPL 2007: 273-278 |
38 | EE | Liang Yun, Abhik Roychoudhury, Tulika Mitra: Timing Analysis of Body Area Network Applications. WCET 2007 |
37 | EE | Xianfeng Li, Liang Yun, Tulika Mitra, Abhik Roychoudhury: Chronos: A timing analyzer for embedded software. Sci. Comput. Program. 69(1-3): 56-67 (2007) |
2006 | ||
36 | EE | Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitra: Integrated scratchpad memory optimization and task scheduling for MPSoC architectures. CASES 2006: 401-410 |
35 | EE | Vivy Suhendra, Tulika Mitra, Abhik Roychoudhury, Ting Chen: Efficient detection and exploitation of infeasible paths for software timing analysis. DAC 2006: 358-363 |
34 | EE | Ramkumar Jayaseelan, Haibin Liu, Tulika Mitra: Exploiting forwarding to improve data bandwidth of instruction-set extensions. DAC 2006: 43-48 |
33 | EE | Ramkumar Jayaseelan, Tulika Mitra, Xianfeng Li: Estimating the Worst-Case Energy Consumption of Embedded Software. IEEE Real Time Technology and Applications Symposium 2006: 81-90 |
32 | EE | Biman Chakraborty, Ting Chen, Tulika Mitra, Abhik Roychoudhury: Handling Constraints in Multi-Objective GA for Embedded System Design. VLSI Design 2006: 305-310 |
31 | EE | Xianfeng Li, Abhik Roychoudhury, Tulika Mitra: Modeling out-of-order processors for WCET analysis. Real-Time Systems 34(3): 195-227 (2006) |
2005 | ||
30 | EE | Pan Yu, Tulika Mitra: Satisfying real-time constraints with custom instructions. CODES+ISSS 2005: 166-171 |
29 | EE | Abhik Roychoudhury, Tulika Mitra, Hemendra Singh Negi: Analyzing Loop Paths for Execution Time Estimation. ICDCIT 2005: 458-469 |
28 | EE | Vivy Suhendra, Tulika Mitra, Abhik Roychoudhury, Ting Chen: WCET Centric Data Allocation to Scratchpad Memory. RTSS 2005: 223-232 |
27 | EE | Ting Chen, Tulika Mitra, Abhik Roychoudhury, Vivy Suhendra: Exploiting Branch Constraints without Exhaustive Path Enumeration. WCET 2005 |
26 | EE | Xianfeng Li, Tulika Mitra, Abhik Roychoudhury: Modeling Control Speculation for Timing Analysis. Real-Time Systems 29(1): 27-58 (2005) |
2004 | ||
25 | EE | Pan Yu, Tulika Mitra: Scalable custom instructions identification for instruction-set extensible processors. CASES 2004: 69-78 |
24 | EE | Pan Yu, Tulika Mitra: Characterizing embedded applications for instruction-set extensible processors. DAC 2004: 723-728 |
23 | EE | Lei He, Tulika Mitra, Weng-Fai Wong: Configuration bitstream compression for dynamically reconfigurable FPGAs. ICCAD 2004: 766-773 |
22 | EE | Xianfeng Li, Hemendra Singh Negi, Tulika Mitra, Abhik Roychoudhury: Design space exploration of caches using compressed traces. ICS 2004: 116-125 |
21 | EE | Tulika Mitra, Abhik Roychoudhury, Qinghua Shen: Impact of Java Memory Model on Out-of-Order Multiprocessors. IEEE PACT 2004: 99-110 |
20 | EE | Xianfeng Li, Abhik Roychoudhury, Tulika Mitra: Modeling Out-of-Order Processors for Software Timing Analysis. RTSS 2004: 92-103 |
2003 | ||
19 | EE | Hemendra Singh Negi, Tulika Mitra, Abhik Roychoudhury: Accurate estimation of cache-related preemption delay. CODES+ISSS 2003: 201-206 |
18 | EE | Xianfeng Li, Tulika Mitra, Abhik Roychoudhury: Accurate timing analysis by modeling caches, speculation and their interaction. DAC 2003: 466-471 |
17 | EE | Abhik Roychoudhury, Tulika Mitra, S. R. Karri: Using Formal Techniques to Debug the AMBA System-on-Chip Bus Protocol. DATE 2003: 10828-10833 |
16 | EE | Tulika Mitra, Tzi-cker Chiueh: Compression-Domain Editing of 3D Models. DCC 2003: 343-352 |
15 | EE | Jirong Liao, Weng-Fai Wong, Tulika Mitra: A Model for Hardware Realization of Kernel Loops. FPL 2003: 334-344 |
14 | EE | Ankit Goel, Abhik Roychoudhury, Tulika Mitra: Compactly representing parallel program executions. PPOPP 2003: 191-202 |
2002 | ||
13 | EE | Tulika Mitra, Tzi-cker Chiueh: An FPGA Implementation of Triangle Mesh Decompression. FCCM 2002: 22- |
12 | EE | Abhik Roychoudhury, Tulika Mitra: Specifying multithreaded Java semantics for program verification. ICSE 2002: 489-499 |
11 | EE | Tulika Mitra, Tzi-cker Chiueh: Compression-Domain Parallel Rendering. IPDPS 2002 |
10 | EE | Abhik Roychoudhury, Xianfeng Li, Tulika Mitra: Timing Analysis of Embedded Software for Speculative Processors. ISSS 2002: 126-131 |
9 | EE | Chuan-Kai Yang, Tulika Mitra, Tzi-cker Chiueh: A Decoupled Architecture for Application-Specific File Prefetching. USENIX Annual Technical Conference, FREENIX Track 2002: 157-170 |
2000 | ||
8 | Tulika Mitra, Chuan-Kai Yang, Tzi-cker Chiueh: Application-Specific File Prefetching for Multimedia Programs. IEEE International Conference on Multimedia and Expo (I) 2000: 459-462 | |
7 | EE | Chuan-Kai Yang, Tulika Mitra, Tzi-cker Chiueh: On-the-Fly rendering of losslessly compressed irregular volume data. IEEE Visualization 2000: 101-108 |
6 | EE | Tzi-cker Chiueh, Tulika Mitra, Anindya Neogi, Chuan-Kai Yang: Zodiac: A history-based interactive video authoring system. Multimedia Syst. 8(3): 201-211 (2000) |
1999 | ||
5 | EE | Sriram Vajapeyam, P. J. Joseph, Tulika Mitra: Dynamic Vectorization: A Mechanism for Exploiting Far-Flung ILP in Ordinary Programs. ISCA 1999: 16-27 |
4 | EE | Tulika Mitra, Tzi-cker Chiueh: Dynamic 3D Graphics Workload Characterization and the Architectural Implications. MICRO 1999: 62-71 |
1998 | ||
3 | EE | Tzi-cker Chiueh, Tulika Mitra, Anindya Neogi, Chuan-Kai Yang: Zodiac: A History-Based Interactive Video Authoring System. ACM Multimedia 1998: 435-444 |
2 | EE | Tulika Mitra, Tzi-cker Chiueh: Implementation and Evaluation of the Parallel Mesa Library. ICPADS 1998: 84-91 |
1997 | ||
1 | EE | Sriram Vajapeyam, Tulika Mitra: Improving Superscalar Instruction Dispatch and Issue by Exploiting Dynamic Code Sequences. ISCA 1997: 1-12 |