2007 |
15 | EE | Deming Chen,
Jason Cong,
Yiping Fan,
Zhiru Zhang:
High-Level Power Estimation and Low-Power Design Space Exploration for FPGAs.
ASP-DAC 2007: 529-534 |
2006 |
14 | EE | Deming Chen,
Jason Cong,
Yiping Fan,
Junjuan Xu:
Optimality study of resource binding with multi-Vdds.
DAC 2006: 580-585 |
13 | EE | Jason Cong,
Yiping Fan,
Guoling Han,
Wei Jiang,
Zhiru Zhang:
Behavior and communication co-optimization for systems with sequential communication media.
DAC 2006: 675-678 |
12 | EE | Jason Cong,
Yiping Fan,
Wei Jiang:
Platform-based resource binding using a distributed register-file microarchitecture.
ICCAD 2006: 709-715 |
2005 |
11 | EE | Jason Cong,
Yiping Fan,
Guoling Han,
Yizhou Lin,
Junjuan Xu,
Zhiru Zhang,
Xu Cheng:
Bitwidth-aware scheduling and binding in high-level synthesis.
ASP-DAC 2005: 856-861 |
10 | EE | Jason Cong,
Yiping Fan,
Guoling Han,
Ashok Jagannathan,
Glenn Reinman,
Zhiru Zhang:
Instruction set extension with shadow registers for configurable processors.
FPGA 2005: 99-106 |
2004 |
9 | EE | Jason Cong,
Yiping Fan,
Zhiru Zhang:
Architecture-level synthesis for automatic interconnect pipelining.
DAC 2004: 602-607 |
8 | EE | Jason Cong,
Yiping Fan,
Guoling Han,
Zhiru Zhang:
Application-specific instruction generation for configurable processor architectures.
FPGA 2004: 183-189 |
7 | EE | Jason Cong,
Yiping Fan,
Guoling Han,
Xun Yang,
Zhiru Zhang:
Architecture and synthesis for on-chip multicycle communication.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(4): 550-564 (2004) |
2003 |
6 | EE | Jason Cong,
Yiping Fan,
Guoling Han,
Xun Yang,
Zhiru Zhang:
Architecture and synthesis for multi-cycle on-chip communication.
CODES+ISSS 2003: 77-78 |
5 | EE | Zhiru Zhang,
Yiping Fan,
Miodrag Potkonjak,
Jason Cong:
Gradual Relaxation Techniques with Applications to Behavioral Synthesis.
ICCAD 2003: 529-535 |
4 | EE | Jason Cong,
Yiping Fan,
Guoling Han,
Xun Yang,
Zhiru Zhang:
Architectural Synthesis Integrated with Global Placement for Multi-Cycle Communication.
ICCAD 2003: 536-543 |
3 | EE | Deming Chen,
Jason Cong,
Yiping Fan:
Low-power high-level synthesis for FPGA architectures.
ISLPED 2003: 134-139 |
2 | EE | Jason Cong,
Yiping Fan,
Xun Yang,
Zhiru Zhang:
Architecture and synthesis for multi-cycle communication.
ISPD 2003: 190-196 |
1999 |
1 | EE | Yiping Fan,
H. Miyagi:
Studying on solution of fuzzy relation equations.
KES 1999: 357-360 |