James C. Hoe

2009
37	EE	Markus Püschel, Peter A. Milder, James C. Hoe: Permuting streaming data using RAMs. J. ACM 56(2): (2009)
2008
36	EE	Peter A. Milder, Franz Franchetti, James C. Hoe, Markus Püschel: Formal datapath representation and manipulation for implementing DSP transforms. DAC 2008: 385-390
35	EE	Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai: A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs. FPGA 2008: 77-86
34	EE	Franz Franchetti, Yevgen Voronenko, Peter A. Milder, Srinivas Chellappa, Marek R. Telgarsky, Hao Shen, Paolo D'Alberto, Frédéric de Mesmay, James C. Hoe, José M. F. Moura, Markus Püschel: Domain-specific library generation for parallel software and hardware platforms. IPDPS 2008: 1-5
33	EE	Patrick Schaumont, Krste Asanovic, James C. Hoe: MEMOCODE 2008 Co-Design Contest. MEMOCODE 2008: 151-154
2007
32	EE	Paolo D'Alberto, Peter A. Milder, Aliaksei Sandryhaila, Franz Franchetti, James C. Hoe, José M. F. Moura, Markus Püschel, Jeremy R. Johnson: Generating FPGA-Accelerated DFT Libraries. FCCM 2007: 173-184
31	EE	Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai: PROToFLEX: FPGA-accelerated Hybrid Functional Simulator. IPDPS 2007: 1-6
30	EE	Forrest Brewer, James C. Hoe: MEMOCODE 2007 Co-Design Contest. MEMOCODE 2007: 91-94
29	EE	Jangwoo Kim, Nikos Hardavellas, Ken Mai, Babak Falsafi, James C. Hoe: Multi-bit Error Tolerant Caches Using Two-Dimensional Error Coding. MICRO 2007: 197-209
28	EE	Jangwoo Kim, Jared C. Smolens, Babak Falsafi, James C. Hoe: PAI: A Lightweight Mechanism for Single-Node Memory Recovery in DSM Servers. PRDC 2007: 298-305
27	EE	John Wawrzynek, David A. Patterson, Mark Oskin, Shih-Lien Lu, Christoforos E. Kozyrakis, James C. Hoe, Derek Chiou, Krste Asanovic: RAMP: Research Accelerator for Multiple Processors. IEEE Micro 27(2): 46-57 (2007)
26	EE	Peter Tummeltshammer, James C. Hoe, Markus Püschel: Time-Multiplexed Multiple-Constant Multiplication. IEEE Trans. on CAD of Integrated Circuits and Systems 26(9): 1551-1563 (2007)
2006
25	EE	Peter A. Milder, Mohammad Ahmad, James C. Hoe, Markus Püschel: Fast and accurate resource estimation of automatically generated custom DFT IP cores. FPGA 2006: 211-220
24	EE	Thomas F. Wenisch, Roland E. Wunderlich, Babak Falsafi, James C. Hoe: Statistical sampling of microarchitecture simulation. IPDPS 2006
23	EE	Thomas F. Wenisch, Roland E. Wunderlich, Babak Falsafi, James C. Hoe: Simulation sampling with live-points. ISPASS 2006: 2-12
22	EE	Jared C. Smolens, Brian T. Gold, Babak Falsafi, James C. Hoe: Reunion: Complexity-Effective Multicore Redundancy. MICRO 2006: 223-234
21	EE	Roland E. Wunderlich, Thomas F. Wenisch, Babak Falsafi, James C. Hoe: Statistical sampling of microarchitecture simulation. ACM Trans. Model. Comput. Simul. 16(3): 197-224 (2006)
20	EE	Thomas F. Wenisch, Roland E. Wunderlich, Michael Ferdman, Anastassia Ailamaki, Babak Falsafi, James C. Hoe: SimFlex: Statistical Sampling of Computer System Simulation. IEEE Micro 26(4): 18-31 (2006)
2005
19	EE	Grace Nordin, Peter A. Milder, James C. Hoe, Markus Püschel: Automatic generation of customized discrete fourier transform IPs. DAC 2005: 471-474
18	EE	Thomas F. Wenisch, Roland E. Wunderlich, Babak Falsafi, James C. Hoe: TurboSMARTS: accurate microarchitecture simulation sampling in minutes. SIGMETRICS 2005: 408-409
17	EE	Brian T. Gold, Jangwoo Kim, Jared C. Smolens, Eric S. Chung, Vasileios Liaskovitis, Eriko Nurvitadhi, Babak Falsafi, James C. Hoe, Andreas Nowatzyk: TRUSS: A Reliable, Scalable Server Architecture. IEEE Micro 25(6): 51-59 (2005)
2004
16	EE	Jared C. Smolens, Brian T. Gold, Jangwoo Kim, Babak Falsafi, James C. Hoe, Andreas Nowatzyk: Fingerprinting: bounding soft-error detection latency and bandwidth. ASPLOS 2004: 224-234
15	EE	Peter Tummeltshammer, James C. Hoe, Markus Püschel: Multiple constant multiplication by time-multiplexed mapping of addition chains. DAC 2004: 826-829
14	EE	Roland E. Wunderlich, James C. Hoe: In-system FPGA prototyping of an itanium microarchitecture. FPGA 2004: 255
13	EE	Markus Püschel, Adam C. Zelinski, James C. Hoe: Custom-optimized multiplierless implementations of DSP algorithms. ICCAD 2004: 175-182
12	EE	Roland E. Wunderlich, James C. Hoe: In-System FPGA Prototyping of an Itanium Microarchitecture. ICCD 2004: 288-294
11	EE	Grace Nordin, James C. Hoe: Synchronous extensions to operation centric hardware description languages. MEMOCODE 2004: 49-56
10	EE	Jared C. Smolens, Jangwoo Kim, James C. Hoe, Babak Falsafi: Efficient Resource Sharing in Concurrent Error Detecting Superscalar Microarchitectures. MICRO 2004: 257-268
9	EE	Jared C. Smolens, Brian T. Gold, Jangwoo Kim, Babak Falsafi, James C. Hoe, Andreas Nowatzyk: Fingerprinting: Bounding Soft-Error-Detection Latency and Bandwidth. IEEE Micro 24(6): 22-29 (2004)
8	EE	James C. Hoe, Arvind: Operation-centric hardware description and synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 23(9): 1277-1288 (2004)
7	EE	Nikolaos Hardavellas, Stephen Somogyi, Thomas F. Wenisch, Roland E. Wunderlich, Shelley Chen, Jangwoo Kim, Babak Falsafi, James C. Hoe, Andreas Nowatzyk: SimFlex: a fast, accurate, flexible full-system simulation framework for performance evaluation of server architecture. SIGMETRICS Performance Evaluation Review 31(4): 31-34 (2004)
2003
6	EE	Joydeep Ray, James C. Hoe: High-level modeling and FPGA prototyping of microprocessors. FPGA 2003: 100-107
5	EE	Roland E. Wunderlich, Thomas F. Wenisch, Babak Falsafi, James C. Hoe: SMARTS: Accelerating Microarchitecture Simulation via Rigorous Statistical Sampling. ISCA 2003: 84-95
2001
4	EE	Joydeep Ray, James C. Hoe, Babak Falsafi: Dual use of superscalar datapath for transient-fault detection and recovery. MICRO 2001: 214-224
2000
3		James C. Hoe, Arvind: Synthesis of Operation-Centric Hardware Descriptions. ICCAD 2000: 511-518
1999
2		James C. Hoe, Arvind: Hardware Synthesis from Term Rewriting Systems. VLSI 1999: 595-619
1995
1		Derek Chiou, Boon Seong Ang, Robert Greiner, Arvind, James C. Hoe, Michael J. Beckerle, James E. Hicks, G. Andrew Boughton: START-NG: Delivering Seamless Parallel Computing. Euro-Par 1995: 101-116

Coauthor Index

1	Mohammad Ahmad	[25]
2	Anastasia Ailamaki (Anastassia Ailamaki, Ailamaki Natassa)	[20]
3	Boon Seong Ang	[1]
4	Arvind	[1] [2] [3] [8]
5	Krste Asanovic	[27] [33]
6	Michael J. Beckerle	[1]
7	G. Andrew Boughton	[1]
8	Forrest Brewer	[30]
9	Srinivas Chellappa	[34]
10	Shelley Chen	[7]
11	Derek Chiou	[1] [27]
12	Eric S. Chung	[17] [31] [35]
13	Paolo D'Alberto	[32] [34]
14	Babak Falsafi	[4] [5] [7] [9] [10] [16] [17] [18] [20] [21] [22] [23] [24] [28] [29] [31] [35]
15	Michael Ferdman	[20]
16	Franz Franchetti	[32] [34] [36]
17	Brian T. Gold (Brian Gold)	[9] [16] [17] [22]
18	Robert Greiner	[1]
19	Nikolaos Hardavellas (Nikos Hardavellas)	[7] [29]
20	James E. Hicks	[1]
21	Jeremy R. Johnson	[32]
22	Jangwoo Kim	[7] [9] [10] [16] [17] [28] [29]
23	Christoforos E. Kozyrakis (Christos Kozyrakis)	[27]
24	Vasileios Liaskovitis	[17]
25	Shih-Lien Lu	[27]
26	Ken Mai	[29] [31] [35]
27	Frédéric de Mesmay	[34]
28	Peter A. Milder	[19] [25] [32] [34] [36] [37]
29	José M. F. Moura	[32] [34]
30	Grace Nordin	[11] [19]
31	Andreas Nowatzyk	[7] [9] [16] [17]
32	Eriko Nurvitadhi	[17] [31] [35]
33	Mark Oskin	[27]
34	David A. Patterson	[27]
35	Markus Püschel	[13] [15] [19] [25] [26] [32] [34] [36] [37]
36	Joydeep Ray	[4] [6]
37	Aliaksei Sandryhaila	[32]
38	Patrick Schaumont	[33]
39	Hao Shen	[34]
40	Jared C. Smolens	[9] [10] [16] [17] [22] [28]
41	Stephen Somogyi	[7]
42	Marek R. Telgarsky	[34]
43	Peter Tummeltshammer	[15] [26]
44	Yevgen Voronenko	[34]
45	John Wawrzynek	[27]
46	Thomas F. Wenisch	[5] [7] [18] [20] [21] [23] [24]
47	Roland E. Wunderlich	[5] [7] [12] [14] [18] [20] [21] [23] [24]
48	Adam C. Zelinski	[13]

Colors in the list of coauthors