2008 | ||
---|---|---|
41 | EE | Ivo Bolsens: FPGA: The future platform for transforming, transporting and computing data. FPL 2008: 1 |
2005 | ||
40 | EE | Jason Cong, Tony Ma, Ivo Bolsens, Phil Moorby, Jan M. Rabaey, John Sanguinetti, Kazutoshi Wakabayashi, Yoshi Watanabe: Are we ready for system-level synthesis? ASP-DAC 2005 |
2004 | ||
39 | EE | Nitin Deo, Behrooz Zahiri, Ivo Bolsens, Jason Cong, Bhusan Gupta, Philip Lopresti, Christopher B. Reynolds, Chris Rowen, Ray Simar: What happened to ASIC?: Go (recon)figure? DAC 2004: 185 |
2003 | ||
38 | EE | Abbas El Gamal, Ivo Bolsens, Andy Broom, Christopher Hamlin, Philippe Magarshack, Zvi Or-Bach, Lawrence T. Pileggi: Fast, cheap and under control: the next implementation fabric. DAC 2003: 354-355 |
37 | EE | Wolfgang Rosenstiel, Rudy Lauwereins, Ivo Bolsens, Chris Rowen, Yankin Tanurhan, Kees A. Vissers, S. Wang: Panel Title: Reconfigurable Computing - Different Perspectives. DATE 2003: 10476-10477 |
36 | EE | Ivo Bolsens: Challenges and Opportunities for FPGA Programmable System Platforms. IOLTS 2003: 3 |
35 | Bart Vanhoof, Lode Nachtergaele, Gauthier Lafruit, Mercedes Peón, Bart Masschelein, Francky Catthoor, Jan Bormans, Ivo Bolsens: A scalable MPEG-4 wavelet-based visual texture compression system with optimized memory organization. IEEE Trans. Circuits Syst. Video Techn. 13(4): 348-357 (2003) | |
2002 | ||
34 | EE | J. Bryan Lewis, Ivo Bolsens, Rudy Lauwereins, Chris Wheddon, Bhusan Gupta, Yankin Tanurhan: Reconfigurable SoC - What Will it Look Like? DATE 2002: 660-663 |
33 | EE | Steve Guccione, Diederik Verkest, Ivo Bolsens: Design Technology for Networked Reconfigurable FPGA Platforms. DATE 2002: 994-999 |
32 | EE | Ivo Bolsens: Challenges and Opportunities for FPGA Platforms. FPL 2002: 391-392 |
2001 | ||
31 | EE | Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde, Marc Engels, Ivo Bolsens: Hardware/software partitioning of embedded system in OCAPI-xl. CODES 2001: 30-35 |
30 | EE | Gerd Vandersteen, Piet Wambacq, Yves Rolain, Johan Schoukens, Stéphane Donnay, Marc Engels, Ivo Bolsens: Efficient bit-error-rate estimation of multicarrier transceivers. DATE 2001: 164-168 |
29 | EE | Mustafa Badaroglu, Marc van Heijningen, Vincent Gravot, Stéphane Donnay, Hugo De Man, Georges G. E. Gielen, Marc Engels, Ivo Bolsens: High-level simulation of substrate noise generation from large digital circuits with multiple supplies. DATE 2001: 326-330 |
28 | EE | Lode Nachtergaele, Toon Gijbels, Jan Bormans, Francky Catthoor, Ivo Bolsens: Power and Speed-Efficient Code Transformation of Video Compression Algorithms for RISC Processors. VLSI Signal Processing 27(1-2): 161-169 (2001) |
2000 | ||
27 | EE | Gerd Vandersteen, Piet Wambacq, Yves Rolain, Petr Dobrovolný, Stéphane Donnay, Marc Engels, Ivo Bolsens: A methodology for efficient high-level dataflow simulation of mixed-signal front-ends of digital telecom transceivers. DAC 2000: 440-445 |
26 | EE | Marc van Heijningen, Mustafa Badaroglu, Stéphane Donnay, Marc Engels, Ivo Bolsens: High-level simulation of substrate noise generation including power supply noise coupling. DAC 2000: 446-451 |
25 | EE | Piet Wambacq, Petr Dobrovolný, Stéphane Donnay, Marc Engels, Ivo Bolsens: Compact Modeling of Nonlinear Distortion in Analog Communication Circuits. DATE 2000: 350- |
24 | EE | Kristof Denolf, Peter Vos, Jan Bormans, Ivo Bolsens: Cost-Efficient C-Level Design of an MPEG-4 Video Decoder. PATMOS 2000: 233-242 |
1999 | ||
23 | EE | Lode Nachtergaele, Bart Vanhoof, Mercedes Peón, Gauthier Lafruit, Jan Bormans, Ivo Bolsens: Implementation of a Scalable MPEG-4 Wavelet-Based Visual Texture Compression System. DAC 1999: 333-336 |
22 | EE | Patrick Schaumont, Radim Cmar, Serge Vernalde, Marc Engels, Ivo Bolsens: Hardware Reuse at the Behavioral Level. DAC 1999: 784-789 |
21 | EE | Radim Cmar, Luc Rijnders, Patrick Schaumont, Serge Vernalde, Ivo Bolsens: A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement. DATE 1999: 271- |
20 | EE | Piet Wambacq, Stéphane Donnay, Hocine Ziad, Marc Engels, Hugo De Man, Ivo Bolsens: A Single-Package Solution for Wireless Transceivers. DATE 1999: 425- |
19 | EE | Ivo Bolsens, Wojtek Maly, Ludo Deferm, Jo Borel, Harry J. M. Veendrick: Single Chip or Hybrid System Integration. DATE 1999: 616- |
18 | EE | Bart Vanhoof, Mercedes Peón, Gauthier Lafruit, Jan Bormans, Lode Nachtergaele, Ivo Bolsens: A Scalable Architecture for MPEG-4 Wavelet Quantization. VLSI Signal Processing 23(1): 93-107 (1999) |
1998 | ||
17 | EE | Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens: A Programming Environment for the Design of Complex High Speed ASICs. DAC 1998: 315-320 |
16 | EE | Patrick Schaumont, Geert Vanmeerbeeck, E. Watzeels, Serge Vernalde, Marc Engels, Ivo Bolsens: A Technique for Combined Virtual Prototyping and Hardware Design. International Workshop on Rapid System Prototyping 1998: 156-161 |
15 | EE | Patrick Schaumont, Serge Vernalde, Marc Engels, Ivo Bolsens: Low Power Digital Frequency Conversion Architectures. VLSI Signal Processing 18(2): 187-197 (1998) |
1997 | ||
14 | EE | Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens: Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications. ED&TC 1997: 542-546 |
13 | Ivo Bolsens, Marco Cecchini: IP-based business conflicts. IEEE Design & Test of Computers 14(2): 4, 92 (1997) | |
12 | EE | Patrick Schaumont, Bart Vanthournout, Ivo Bolsens, Hugo De Man: Synthesis of pipelined DSP accelerators with dynamic scheduling. IEEE Trans. VLSI Syst. 5(1): 59-68 (1997) |
1996 | ||
11 | EE | Elisabeth Berrebi, Polen Kission, Serge Vernalde, S. De Troch, Jean-Claude Herluison, Jean Fréhel, Ahmed Amine Jerraya, Ivo Bolsens: Combined Control Flow Dominated and Data Flow Dominated High-Level Synthesis. DAC 1996: 573-578 |
10 | EE | S. Samel, Bert Gyselinckx, Ivo Bolsens, Hugo De Man: Designing Systems On Silicon: A Digital Spread Spectrum Pager. VLSI Design 1996: 311-312 |
1995 | ||
9 | EE | Zohair Sahraoui, Paul Six, Ivo Bolsens, Hugo De Man: Search space reduction through clustering in test generation. EURO-DAC 1995: 242-247 |
8 | EE | Patrick Schaumont, Bart Vanthournout, Ivo Bolsens, Hugo De Man: Synthesis of pipelined DSP accelerators with dynamic scheduling. ISSS 1995: 72-77 |
1994 | ||
7 | EE | Koen Van Nieuwenhove, Kjell Cools, D. Devisch, Ivo Bolsens, Serge Vernalde, Kim Chansik, R. B. W. Lee, Oh Younguk: ASIC synthesis of a flexible 80 Mbit/s Reed-Solomon Codec. EURO-DAC 1994: 658-663 |
6 | EE | Gert Goossens, Ivo Bolsens, Bill Lin, Francky Catthoor: Design of heterogeneous ICs for mobile and personal communication systems. ICCAD 1994: 524-531 |
1992 | ||
5 | Karl van Rompaey, Ivo Bolsens, Hugo De Man: Just in Time Scheduling. ICCD 1992: 295-300 | |
4 | Evagelos Katsadas, Zohair Sahraoui, M. Wouters, Veerle Derudder, Ivo Bolsens, Paul Six, Hugo De Man: Regular Module Generation or Standard Cells: Two Alternative Implementations of a Library of Functional Building Blocks. Synthesis for Control Dominated Circuits 1992: 167-181 | |
1991 | ||
3 | J. Vanhoof, Ivo Bolsens, Hugo De Man: Compiling Multi-Dimensional Data Streams into Distributed DSP ASIC Memory. ICCAD 1991: 272-275 | |
1989 | ||
2 | EE | Ivo Bolsens, W. De Rammelaere, Luc J. M. Claesen, Hugo De Man: Electrical Debugging of Synchronous MOS VLSI Circuits Exploiting Analysis of the Intended Logic Behaviour. DAC 1989: 513-518 |
1985 | ||
1 | EE | Hugo De Man, Ivo Bolsens, E. Vanden Meersch, Johan Van Cleynenbreugel: DIALOG: An Expert Debugging System for MOSVLSI Design. IEEE Trans. on CAD of Integrated Circuits and Systems 4(3): 303-311 (1985) |