Xiaoyong Tang

2007
12	EE	Gaurav Mittal, David Zaretsky, Xiaoyong Tang, Prithviraj Banerjee: An Overview of a Compiler for Mapping Software Binaries to Hardware. IEEE Trans. VLSI Syst. 15(11): 1177-1190 (2007)
2006
11	EE	Chunling Zhu, Xiaoyong Tang, Kenli Li, Xiao Han, Xilu Zhu, Xuesheng Qi: Integrating Trust into Grid Economic Model Scheduling Algorithm. OTM Conferences (2) 2006: 1263-1272
10	EE	Xiaoyong Tang, Kenli Li, Degui Xiao, Jing Yang, Min Liu, Yunchuan Qin: A Dynamic Communication Contention Awareness List Scheduling Algorithm for Arbitrary Heterogeneous System. OTM Conferences (2) 2006: 1315-1324
2005
9	EE	Xiaoyong Tang, Hai Zhou, Prithviraj Banerjee: Leakage power optimization with dual-Vth library in high-level synthesis. DAC 2005: 202-207
8	EE	Xiaoyong Tang, Tianyi Jiang, Alex K. Jones, Prithviraj Banerjee: Behavioral Synthesis of Data-Dominated Circuits for Minimal Energy Implementation. VLSI Design 2005: 267-273
7	EE	Xiaoyong Tang, Tianyi Jiang, Alex K. Jones, Prithviraj Banerjee: High-Level Synthesis for Low Power Hardware Implementation of Unscheduled Data-Dominated Circuits. J. Low Power Electronics 1(3): 259-272 (2005)
2004
6	EE	Tianyi Jiang, Xiaoyong Tang, Prithviraj Banerjee: Macro-models for high level area and power estimation on FPGAs. ACM Great Lakes Symposium on VLSI 2004: 162-165
5	EE	David Zaretsky, Gaurav Mittal, Xiaoyong Tang, Prithviraj Banerjee: Evaluation of scheduling and allocation algorithms while mapping assembly code onto FPGAs. ACM Great Lakes Symposium on VLSI 2004: 397-400
4	EE	Gaurav Mittal, David Zaretsky, Xiaoyong Tang, Prithviraj Banerjee: Automatic translation of software binaries onto FPGAs. DAC 2004: 389-394
3	EE	David Zaretsky, Gaurav Mittal, Xiaoyong Tang, Prithviraj Banerjee: Overview of the FREEDOM Compiler for Mapping DSP Software to FPGAs. FCCM 2004: 37-46
2	EE	Tianyi Jiang, Xiaoyong Tang, Prithviraj Banerjee: High level area, delay and power estimation for FPGAs. FPGA 2004: 249
2002
1	EE	Alex K. Jones, Debabrata Bagchi, Satrajit Pal, Xiaoyong Tang, Alok N. Choudhary, Prithviraj Banerjee: PACT HDL: a C compiler targeting ASICs and FPGAs with power and performance optimizations. CASES 2002: 188-197

Coauthor Index

1	Debabrata Bagchi	[1]
2	Prithviraj Banerjee (Prith Banerjee)	[1] [2] [3] [4] [5] [6] [7] [8] [9] [12]
3	Alok N. Choudhary	[1]
4	Xiao Han	[11]
5	Tianyi Jiang	[2] [6] [7] [8]
6	Alex K. Jones	[1] [7] [8]
7	Kenli Li	[10] [11]
8	Min Liu	[10]
9	Gaurav Mittal	[3] [4] [5] [12]
10	Satrajit Pal	[1]
11	Xuesheng Qi	[11]
12	Yunchuan Qin	[10]
13	Degui Xiao	[10]
14	Jing Yang	[10]
15	David Zaretsky	[3] [4] [5] [12]
16	Hai Zhou	[9]
17	Chunling Zhu	[11]
18	Xilu Zhu	[11]

Colors in the list of coauthors