Sambuddha Bhattacharya

2009
15	EE	Subramanian Rajagopalan, Sambuddha Bhattacharya, Shabbir H. Batterywala: Efficient Analog/RF Layout Closure with Compaction Based Legalization. VLSI Design 2009: 137-142
2008
14	EE	Sambuddha Bhattacharya, Shabbir H. Batterywala, Subramanian Rajagopalan, Hi-Keung Tony Ma, Narendra V. Shenoy: On Efficient and Robust Constraint Generation for Practical Layout Legalization. ISQED 2008: 379-384
13	EE	Shabbir H. Batterywala, Sambuddha Bhattacharya, Subramanian Rajagopalan, Hi-Keung Tony Ma, Narendra V. Shenoy: Cell Swapping Based Migration Methodology for Analog and Custom Layouts. ISQED 2008: 450-455
12	EE	Lihong Zhang, Nuttorn Jangkrajarng, Sambuddha Bhattacharya, C.-J. Richard Shi: Parasitic-Aware Optimization and Retargeting of Analog Layouts: A Symbolic-Template Approach. IEEE Trans. on CAD of Integrated Circuits and Systems 27(5): 791-802 (2008)
2006
11	EE	Nuttorn Jangkrajarng, Lihong Zhang, Sambuddha Bhattacharya, Nathan Kohagen, C.-J. Richard Shi: Template-based parasitic-aware optimization and retargeting of analog and RF integrated circuit layouts. ICCAD 2006: 342-348
10	EE	Sambuddha Bhattacharya, Nuttorn Jangkrajarng, C.-J. Richard Shi: Multilevel symmetry-constraint generation for retargeting large analog layouts. IEEE Trans. on CAD of Integrated Circuits and Systems 25(6): 945-960 (2006)
2005
9	EE	Sambuddha Bhattacharya, Nuttorn Jangkrajarng, C.-J. Richard Shi: Template-driven parasitic-aware optimization of analog integrated circuit layouts. DAC 2005: 644-647
8	EE	Roy Hartono, Nuttorn Jangkrajarng, Sambuddha Bhattacharya, C.-J. Richard Shi: Automatic Device Layout Generation for Analog Layout Retargeting. VLSI Design 2005: 457-462
2004
7	EE	Zhao Li, Ravikanth Suravarapu, Roy Hartono, Sambuddha Bhattacharya, Kartikeya Mayaram, C.-J. Richard Shi: CrtSmile: a CAD tool for CMOS RF transistor substrate modeling incorporating layout effects. ASP-DAC 2004: 163-168
6	EE	Nuttorn Jangkrajarng, Sambuddha Bhattacharya, Roy Hartono, C.-J. Richard Shi: Multiple specifications radio-frequency integrated circuit design with automatic template-driven layout retargeting. ASP-DAC 2004: 394-399
5	EE	Sambuddha Bhattacharya, Nuttorn Jangkrajarng, Roy Hartono, C.-J. Richard Shi: Hierarchical extraction and verification of symmetry constraints for analog layout automation. ASP-DAC 2004: 400-405
4	EE	Sambuddha Bhattacharya, Nuttorn Jangkrajarng, Roy Hartono, C.-J. Richard Shi: Correct-by-construction layout-centric retargeting of large analog designs. DAC 2004: 139-144
2003
3	EE	Sambuddha Bhattacharya, C.-J. Richard Shi: Concurrent logic and interconnect delay estimation of MOS circuits by mixed algebraic and Boolean symbolic analysis. ISCAS (4) 2003: 660-663
2	EE	Nuttorn Jangkrajarng, Sambuddha Bhattacharya, Roy Hartono, C.-J. Richard Shi: Automatic analog layout retargeting for new processes and device sizes. ISCAS (4) 2003: 704-707
1	EE	Nuttorn Jangkrajarng, Sambuddha Bhattacharya, Roy Hartono, C.-J. Richard Shi: IPRAIL - intellectual property reuse-based analog IC layout automation. Integration 36(4): 237-262 (2003)

Coauthor Index

1	Shabbir H. Batterywala	[13] [14] [15]
2	Roy Hartono	[1] [2] [4] [5] [6] [7] [8]
3	Nuttorn Jangkrajarng	[1] [2] [4] [5] [6] [8] [9] [10] [11] [12]
4	Nathan Kohagen	[11]
5	Zhao Li	[7]
6	Hi-Keung Tony Ma	[13] [14]
7	Kartikeya Mayaram	[7]
8	Subramanian Rajagopalan	[13] [14] [15]
9	Narendra V. Shenoy	[13] [14]
10	C.-J. Richard Shi	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
11	Ravikanth Suravarapu	[7]
12	Lihong Zhang	[11] [12]