2009 | ||
---|---|---|
35 | EE | Rouwaida Kanj, Rajiv V. Joshi, Jente B. Kuang, J. Kim, Mesut Meterelliyoz, W. Reohr, Sani R. Nassif, Kevin J. Nowka: Statistical yield analysis of silicon-on-insulator embedded DRAM. ISQED 2009: 190-194 |
2008 | ||
34 | EE | Victoria Wang, Kanak Agarwal, Sani R. Nassif, Kevin J. Nowka, Dejan Markovic: A Design Model for Random Process Variability. ISQED 2008: 734-737 |
33 | EE | Jente B. Kuang, Keunwoo Kim, Ching-Te Chuang, Hung C. Ngo, F. H. Gebara, Kevin J. Nowka: Circuit Techniques Utilizing Independent Gate Control in Double-Gate Technologies. IEEE Trans. VLSI Syst. 16(12): 1657-1665 (2008) |
32 | EE | Ramyanshu Datta, Jacob A. Abraham, Abdulkadir Utku Diril, Abhijit Chatterjee, Kevin J. Nowka: Performance-Optimized Design for Parametric Reliability. J. Electronic Testing 24(1-3): 129-141 (2008) |
2007 | ||
31 | EE | Kanak Agarwal, Kevin J. Nowka: Dynamic Power Management by Combination of Dual Static Supply Voltages. ISQED 2007: 85-92 |
30 | EE | H. Singh, Kanak Agarwal, Dennis Sylvester, Kevin J. Nowka: Enhanced Leakage Reduction Techniques Using Intermediate Strength Power Gating. IEEE Trans. VLSI Syst. 15(11): 1215-1224 (2007) |
2006 | ||
29 | EE | Ramyanshu Datta, Jacob A. Abraham, Abdulkadir Utku Diril, Abhijit Chatterjee, Kevin J. Nowka: Adaptive Design for Performance-Optimized Robustness. DFT 2006: 3-11 |
28 | EE | Harmander Deogun, Dennis Sylvester, Kevin J. Nowka: Fine grained multi-threshold CMOS for enhanced leakage reduction. ISCAS 2006 |
27 | EE | Harmander Deogun, Robert M. Senger, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka: A dual-VDD boosted pulsed bus technique for low power and low leakage operation. ISLPED 2006: 73-78 |
26 | EE | Praveen Elakkumanan, Jente B. Kuang, Kevin J. Nowka, Ramalingam Sridhar, Rouwaida Kanj, Sani R. Nassif: SRAM Local Bit Line Access Failure Analyses. ISQED 2006: 204-209 |
25 | EE | Kanak Agarwal, Kevin J. Nowka, Harmander Deogun, Dennis Sylvester: Power Gating with Multiple Sleep Modes. ISQED 2006: 633-637 |
24 | EE | Xiao Yan Yu, Robert K. Montoye, Kevin J. Nowka, Bart R. Zeydel, Vojin G. Oklobdzija: Circuit Design Style for Energy Efficiency: LSDL and Compound Domino. PATMOS 2006: 47-55 |
23 | EE | Jayakumaran Sivagnaname, Hung C. Ngo, Kevin J. Nowka, Robert K. Montoye, Richard B. Brown: Gate-Induced Barrier Field Effect Transistor (GBFET) - A New Thin Film Transistor for Active Matrix Liquid Crystal Display Systems. VLSI Design 2006: 89-93 |
22 | EE | Ramyanshu Datta, Gary D. Carpenter, Kevin J. Nowka, Jacob A. Abraham: A Scheme for On-Chip Timing Characterization. VTS 2006: 24-29 |
2005 | ||
21 | EE | Jente B. Kuang, Hung C. Ngo, Kevin J. Nowka, J. C. Law, Rajiv V. Joshi: A Low-Overhead Virtual Rail Technique for SRAM Leakage Power Reduction. ICCD 2005: 574-584 |
20 | EE | Rahul M. Rao, Kanak Agarwal, Anirudh Devgan, Kevin J. Nowka, Dennis Sylvester, Richard B. Brown: Parametric Yield Analysis and Constrained-Based Supply Voltage Optimization. ISQED 2005: 284-290 |
19 | EE | Jayakumaran Sivagnaname, Hung C. Ngo, Kevin J. Nowka, Robert K. Montoye, Richard B. Brown: Controlled-Load Limited Switch Dynamic Logic Circuit. ISQED 2005: 83-87 |
18 | EE | Harmander Deogun, Rahul M. Rao, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka: Dynamically Pulsed MTCMOS with Bus Encoding for Total Power and Crosstalk Minimization. ISQED 2005: 88-93 |
17 | EE | Sachin S. Sapatnekar, Kevin J. Nowka: Guest Editors' Introduction: New Dimensions in 3D Integration. IEEE Design & Test of Computers 22(6): 496-497 (2005) |
2004 | ||
16 | EE | Juan Antonio Carballo, Kevin J. Nowka, Seung-Moon Yoo, Ivan Vo, Clay Cranford, V. Robert Norman: Requirement-based design methods for adaptive communications links. DAC 2004: 93-98 |
15 | Ramyanshu Datta, Jacob A. Abraham, Robert K. Montoye, Wendy Belluomini, Hung C. Ngo, Chandler McDowell, Jente B. Kuang, Kevin J. Nowka: A low latency and low power dynamic Carry Save Adder. ISCAS (2) 2004: 477-480 | |
14 | EE | Rahul M. Rao, Kanak Agarwal, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka, Sani R. Nassif: Approaches to run-time and standby mode leakage reduction in global buses. ISLPED 2004: 188-193 |
2003 | ||
13 | Alan J. Drake, Kevin J. Nowka, Richard B. Brown: Evaluation of Dynamic-Threshold Logic for Low-Power VLSI Design in 0.13um PD-SOI. VLSI-SOC 2003: 263- | |
12 | EE | Kevin J. Nowka, Gary D. Carpenter, Bishop Brock: The design and application of the PowerPC 405LP energy-efficient system-on-a-chip. IBM Journal of Research and Development 47(5-6): 631-640 (2003) |
2002 | ||
11 | EE | Ohsang Kwon, Kevin J. Nowka, Earl E. Swartzlander Jr.: A 16-Bit by 16-Bit MAC Design Using Fast 5: 3 Compressor Cells. VLSI Signal Processing 31(2): 77-89 (2002) |
2001 | ||
10 | EE | Ohsang Kwon, Earl E. Swartzlander Jr., Kevin J. Nowka: A fast hybrid carry-lookahead/carry-select adder design. ACM Great Lakes Symposium on VLSI 2001: 149-152 |
9 | EE | Martin S. Schmookler, Kevin J. Nowka: Leading Zero Anticipation and Detection-A Comparison of Methods. IEEE Symposium on Computer Arithmetic 2001: 7-12 |
8 | EE | Hoang Q. Dao, Kevin J. Nowka, Vojin G. Oklobdzija: Analysis of clocked timing elements for dynamic voltage scaling effects over process parameter variation. ISLPED 2001: 56-59 |
2000 | ||
7 | EE | Ohsang Kwon, Earl E. Swartzlander Jr., Kevin J. Nowka: A 16-Bit x 16-Bit MAC Design Using Fast 5: 2 Compressors. ASAP 2000: 235- |
6 | EE | Stephen D. Posluszny, N. Aoki, David Boerstler, P. Coulman, Sang H. Dhong, Brian K. Flachs, H. Peter Hofstee, N. Kojima, Ohsang Kwon, K. Lee, D. Meltzer, Kevin J. Nowka, J. Park, J. Peter, Joel Silberman, Osamu Takahashi, Paul Villarrubia: "Timing closure by design, " a high frequency microprocessor design methodology. DAC 2000: 712-717 |
5 | EE | David H. Allen, Sang H. Dhong, H. Peter Hofstee, Jens Leenstra, Kevin J. Nowka, Daniel L. Stasiak, Dieter F. Wendel: Custom circuit design as a driver of microprocessor performance. IBM Journal of Research and Development 44(6): 799-822 (2000) |
1998 | ||
4 | EE | David F. Heidel, Sang H. Dhong, H. Peter Hofstee, Michael Immediato, Kevin J. Nowka, Joel Silberman, Kevin G. Stawiasz: High-Speed Serializing/De-Serializing Design-For-Test Method for Evaluating a 1 GHz Microprocessor. VTS 1998: 234-238 |
1997 | ||
3 | EE | Kevin J. Nowka, H. Peter Hofstee: Circuits and Microarchitecture for Gigahertz VLSI Designs. ARVLSI 1997: 284-287 |
1995 | ||
2 | EE | Michael J. Flynn, Kevin J. Nowka, G. Bewick, Eric M. Schwarz, Nhon T. Quach: The SNAP Project: Towards Sub-Nanosecond Arithmetic. IEEE Symposium on Computer Arithmetic 1995: 75- |
1 | Kevin J. Nowka, Michael J. Flynn: System Design Using Wave-Pipelining: A CMOS VLSI Vector Unit. ISCAS 1995: 2301-2304 |