Vinay Verma

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6EEShantanu Dutt, Vinay Verma, Vishal Suthar: Built-in-Self-Test of FPGAs With Provable Diagnosabilities and High Diagnostic Coverage With Application to Online Testing. IEEE Trans. on CAD of Integrated Circuits and Systems 27(2): 309-326 (2008)
5EEVinay Verma, Shantanu Dutt, Vishal Suthar: Efficient on-line testing of FPGAs with provable diagnosabilities. DAC 2004: 498-503
4EEVinay Verma, Shantanu Dutt: Roving testing using new built-in-self-tester designs for FPGAs. FPGA 2004: 257
3EEShantanu Dutt, Vinay Verma, Hasan Arslan: A search-based bump-and-refit approach to incremental routing for ECO applications in FPGAs. ACM Trans. Design Autom. Electr. Syst. 7(4): 664-693 (2002)
2EEVinay Verma, Shantanu Dutt: A Search-Based Bump-and-Refit Approach to Incremental Routing for ECO Applications in FPGAs. ICCAD 2001: 144-
1 Miron Abramovici, Charles E. Stroud, Carter Hamilton, Sajitha Wijesuriya, Vinay Verma: Using roving STARs for on-line testing and diagnosis of FPGAs in fault-tolerant applications. ITC 1999: 973-982

Coauthor Index

1Miron Abramovici [1]
2Hasan Arslan [3]
3Shantanu Dutt [2] [3] [4] [5] [6]
4Carter Hamilton [1]
5Charles E. Stroud [1]
6Vishal Suthar [5] [6]
7Sajitha Wijesuriya [1]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)