Carlo Brandolese

2007
16	EE	Carlo Brandolese, D. Crespi, Laura Frigerio, Fabio Salice: A New Framework for Design and Simulation of Complex Hardware/Software Systems. DSD 2007: 236-243
2006
15	EE	Carlo Brandolese, William Fornaciari, Luigi Pomante, Fabio Salice, Donatella Sciuto: Affinity-Driven System Design Exploration for Heterogeneous Multiprocessor SoC. IEEE Trans. Computers 55(5): 508-519 (2006)
14	EE	Daniele Paolo Scarpazza, Carlo Brandolese: A Fast, Dynamic, Fine-Detail, Source Level Technique to Estimate the Energy Consumed by Embedded Software on Single-Issue Processor Cores. J. Low Power Electronics 2(2): 129-139 (2006)
2004
13	EE	Carlo Brandolese, William Fornaciari, Fabio Salice: An area estimation methodology for FPGA based designs at systemc-level. DAC 2004: 129-132
12	EE	Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto: Analysis and Modeling of Energy Reducing Source Code Transformations. DATE 2004: 306-311
11	EE	Carlo Brandolese, William Fornaciari, Fabio Salice: Discrete-Event Modeling and Simulation of Superscalar Microprocessor Architectures. PATMOS 2004: 238-247
2003
10	EE	Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto: Library Functions Timing Characterization for Source-Level Analysis. DATE 2003: 11132-11133
2002
9	EE	William Fornaciari, Vito Trianni, Carlo Brandolese, Donatella Sciuto, Fabio Salice, Giovanni Beltrame: Modeling Assembly Instruction Timing in Superscalar Architectures. ISSS 2002: 132-137
8	EE	Carlo Brandolese, Fabio Salice, William Fornaciari, Donatella Sciuto: Static power modeling of 32-bit microprocessors. IEEE Trans. on CAD of Integrated Circuits and Systems 21(11): 1306-1316 (2002)
7	EE	Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto: The Impact of Source Code Transformations on Software Power and Energy Consumption. Journal of Circuits, Systems, and Computers 11(5): 477-502 (2002)
2001
6	EE	Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto: Source-level execution time estimation of C programs. CODES 2001: 98-103
5	EE	Giovanni Beltrame, Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto, Vito Trianni: An Assembly-Level Execution-Time Model for Pipelined Architectures. ICCAD 2001: 195-200
4		Giovanni Beltrame, Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto, Vito Trianni: Dynamic modeling of inter-instruction effects for execution time estimation. ISSS 2001: 136-141
2000
3	EE	Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto: Energy estimation for 32-bit microprocessors. CODES 2000: 24-28
2	EE	Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto: An instruction-level functionally-based energy estimation model for 32-bits microprocessors. DAC 2000: 346-351
1	EE	Carlo Brandolese, William Fornaciari, Luigi Pomante, Fabio Salice, Donatella Sciuto: A Multi-Level Strategy for Software Power Estimation. ISSS 2000: 187-192

Coauthor Index

1	Giovanni Beltrame	[4] [5] [9]
2	D. Crespi	[16]
3	William Fornaciari	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [15]
4	Laura Frigerio	[16]
5	Luigi Pomante	[1] [15]
6	Fabio Salice	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [15] [16]
7	Daniele Paolo Scarpazza	[14]
8	Donatella Sciuto	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [12] [15]
9	Vito Trianni	[4] [5] [9]