| 2009 |
|---|
| 36 | EE | Andrew C. Ling,
Stephen Dean Brown,
Jianwen Zhu,
Sean Safarpour:
Towards automated ECOs in FPGAs.
FPGA 2009: 3-12 |
| 2008 |
|---|
| 35 | EE | Andrew C. Ling,
Jianwen Zhu,
Stephen Dean Brown:
Delay driven AIG restructuring using slack budget management.
ACM Great Lakes Symposium on VLSI 2008: 163-166 |
| 34 | EE | Andrew C. Ling,
Jianwen Zhu,
Stephen Dean Brown:
Scalable Synthesis and Clustering Techniques Using Decision Diagrams.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(3): 423-435 (2008) |
| 2007 |
|---|
| 33 | EE | Andrew C. Ling,
Jianwen Zhu,
Stephen Dean Brown:
BddCut: Towards Scalable Symbolic Cut Enumeration.
ASP-DAC 2007: 408-413 |
| 2006 |
|---|
| 32 | EE | Bin Wu,
Jianwen Zhu,
Farid N. Najm:
Dynamic-range estimation.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1618-1636 (2006) |
| 2005 |
|---|
| 31 | EE | Dennis Wu,
Jianwen Zhu:
BDD-based two variable sharing extraction.
ASP-DAC 2005: 1031-1034 |
| 30 | EE | Rami Beidas,
Jianwen Zhu:
Scalable interprocedural register allocation for high level synthesis.
ASP-DAC 2005: 511-516 |
| 29 | EE | Jianwen Zhu:
Towards scalable flow and context sensitive pointer analysis.
DAC 2005: 831-836 |
| 28 | EE | Bin Wu,
Jianwen Zhu,
Farid N. Najm:
A non-parametric approach for dynamic range estimation of nonlinear systems.
DAC 2005: 841-844 |
| 27 | EE | Qianying Tang,
Jianwen Zhu:
Two-Dimensional Layout Migration by Soft Constraint Satisfaction.
ISQED 2005: 35-39 |
| 26 | EE | Jianwen Zhu,
Silvian Calman:
Context sensitive symbolic pointer analysis.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(4): 516-531 (2005) |
| 25 | EE | Jianwen Zhu,
Fang Fang,
Qianying Tang:
Calligrapher: a new layout-migration engine for hard intellectual property libraries.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(9): 1347-1361 (2005) |
| 2004 |
|---|
| 24 | EE | Zhong Wang,
Jianwen Zhu:
Piecewise quadratic waveform matching with successive chord iteration.
ASP-DAC 2004: 274-279 |
| 23 | EE | Fang Fang,
Jianwen Zhu:
Automatic process migration of datapath hard IP libraries.
ASP-DAC 2004: 887-892 |
| 22 | EE | Bin Wu,
Jianwen Zhu,
Farid N. Najm:
An analytical approach for dynamic range estimation.
DAC 2004: 472-477 |
| 21 | | Rami Beidas,
Jianwen Zhu:
A queuing-theoretic performance model for context-flow system-on-chip platforms.
ESTImedia 2004: 21-26 |
| 20 | EE | Massimo Poncino,
Jianwen Zhu:
DynamoSim: a trace-based dynamically compiled instruction set simulator.
ICCAD 2004: 131-136 |
| 19 | EE | Bin Wu,
Jianwen Zhu,
Farid N. Najm:
Dynamic range estimation for nonlinear systems.
ICCAD 2004: 660-667 |
| 18 | EE | Fang Fang,
Jianwen Zhu:
Calligrapher: A New Layout Migration Engine Based on Geometric Closeness.
ISQED 2004: 25-30 |
| 17 | EE | Khushwinder Jasrotia,
Jianwen Zhu:
Stacked FSMD: A Power Efficient Micro-Architecture for High Level Synthesis.
ISQED 2004: 425-430 |
| 16 | EE | Jianwen Zhu,
Silvian Calman:
Symbolic pointer analysis revisited.
PLDI 2004: 145-157 |
| 2003 |
|---|
| 15 | EE | Wai Sum Mong,
Jianwen Zhu:
A retargetable micro-architecture simulator.
DAC 2003: 752-757 |
| 14 | EE | Jianwen Zhu,
Wai Sum Mong:
Specification of Non-Functional Intellectual Property Components.
DATE 2003: 10456-10461 |
| 13 | EE | Zhong Wang,
Jianwen Zhu:
Transistor-Level Static Timing Analysis by Piecewise Quadratic Waveform Matching.
DATE 2003: 11026-11031 |
| 12 | EE | Rami Beidas,
Jianwen Zhu:
Performance Efficiency of Context-Flow System-on-Chip Platform.
ICCAD 2003: 356-362 |
| 2002 |
|---|
| 11 | EE | Maghsoud Abbaspour,
Jianwen Zhu:
Retargetable binary utilities.
DAC 2002: 331-336 |
| 10 | EE | Khushwinder Jasrotia,
Jianwen Zhu:
Hardware Implementation of a Memory Allocator.
DSD 2002: 355-358 |
| 9 | EE | Jianwen Zhu:
Symbolic pointer analysis.
ICCAD 2002: 150-157 |
| 8 | EE | Jianwen Zhu,
Daniel D. Gajski:
An ultra-fast instruction set simulator.
IEEE Trans. VLSI Syst. 10(3): 363-373 (2002) |
| 2001 |
|---|
| 7 | EE | Jianwen Zhu,
Daniel Gajski:
Compiling SpecC for simulation.
ASP-DAC 2001: 57-62 |
| 6 | EE | Jianwen Zhu:
Static memory allocation by pointer analysis and coloring.
DATE 2001: 785-790 |
| 5 | EE | Jianwen Zhu,
Edward S. Rogers Sr.:
Color Permutation: An Iterative Algorithm for Memory Packing.
ICCAD 2001: 380-383 |
| 1999 |
|---|
| 4 | EE | Jianwen Zhu,
Daniel Gajski:
A unified formal model of ISA and FSMD.
CODES 1999: 121-125 |
| 3 | EE | Jianwen Zhu,
Daniel Gajski:
Soft Scheduling in High Level Synthesis.
DAC 1999: 219-224 |
| 2 | EE | Jianwen Zhu,
Daniel Gajski:
OpenJ: An Extensible System Level Design Language.
DATE 1999: 480-484 |
| 1998 |
|---|
| 1 | | Daniel Gajski,
Rainer Dömer,
Jianwen Zhu:
IP-Centric Methodology and Specification Language.
DIPES 1998: 3-22 |
