other persons with the same name:
2005 | ||
---|---|---|
17 | EE | Ruchir Puri, David S. Kung, Leon Stok: Minimizing power with flexible voltage islands. ISCAS (1) 2005: 21-24 |
16 | EE | Renato Fernandes Hentschke, Jagannathan Narasimhan, David S. Kung: Improving run times by pruned application of synthesis transforms. SBCCI 2005: 38-43 |
15 | EE | Haoxing Ren, David Zhigang Pan, David S. Kung: Sensitivity guided net weighting for placement-driven synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 24(5): 711-721 (2005) |
2004 | ||
14 | EE | David S. Kung: Timing closure for low-FO4 microprocessor design. DAC 2004: 265-266 |
13 | EE | Haoxing Ren, David Zhigang Pan, David S. Kung: Sensitivity guided net weighting for placement driven synthesis. ISPD 2004: 10-17 |
12 | EE | Louise Trevillyan, David S. Kung, Ruchir Puri, Lakshmi N. Reddy, Michael A. Kazda: An Integrated Environment for Technology Closure of Deep-Submicron IC Designs. IEEE Design & Test of Computers 21(1): 14-22 (2004) |
2003 | ||
11 | EE | Ruchir Puri, Leon Stok, John M. Cohn, David S. Kung, David Z. Pan, Dennis Sylvester, Ashish Srivastava, Sarvesh H. Kulkarni: Pushing ASIC performance in a power envelope. DAC 2003: 788-793 |
2002 | ||
10 | EE | Ruchir Puri, David S. Kung, Anthony D. Drumm: Fast and accurate wire delay estimation for physical synthesis of large ASICs. ACM Great Lakes Symposium on VLSI 2002: 30-36 |
2000 | ||
9 | EE | Frederik Beeftink, Prabhakar Kudva, David S. Kung, Ruchir Puri, Leon Stok: Combinatorial cell design for CMOS libraries. Integration 29(1): 67-93 (2000) |
1999 | ||
8 | EE | David S. Kung, Ruchir Puri: Optimal P/N width ratio selection for standard cell libraries. ICCAD 1999: 178-184 |
1998 | ||
7 | EE | David S. Kung: A Fast Fanout Optimization Algorithm for Near-Continuous Buffer Libraries. DAC 1998: 352-355 |
6 | EE | Frederik Beeftink, Prabhakar Kudva, David S. Kung, Leon Stok: Gate-size selection for standard cell libraries. ICCAD 1998: 545-550 |
1996 | ||
5 | Ahmed Ispahani, David S. Kung, Emile J. Pilafidis: University of La Verne and GTE: A Partnership in Delivering Graduate Business Programs Through Information Technology. Multimedia Technology and Applications 1996: 249-255 | |
4 | Ahmed Ispahani, David S. Kung, Emile J. Pilafidis, Mabel T. Kung: The Role of Multimedia Technology in the Delivery of Academic Programs in Satellite Facilities. Multimedia Technology and Applications 1996: 558-563 | |
3 | Leon Stok, David S. Kung, Daniel Brand, Anthony D. Drumm, Andrew J. Sullivan, Lakshmi N. Reddy, Nathaniel Hieter, David J. Geiger, Han Hsun Chao, Peter J. Osler: BooleDozer: Logic synthesis for ASICs. IBM Journal of Research and Development 40(4): 407-430 (1996) | |
1992 | ||
2 | EE | David S. Kung, Robert F. Damiano, Theresa A. Nix, David J. Geiger: BDDMAP: A Technology Mapper Based on a New Covering Algorithm. DAC 1992: 484-487 |
1 | EE | David S. Kung: Hazard-non-increasing gate-level optimization algorithms. ICCAD 1992: 631-634 |
1 | Frederik Beeftink | [6] [9] |
2 | Daniel Brand | [3] |
3 | Han Hsun Chao | [3] |
4 | John M. Cohn | [11] |
5 | Robert F. Damiano | [2] |
6 | Anthony D. Drumm | [3] [10] |
7 | David J. Geiger | [2] [3] |
8 | Renato Fernandes Hentschke | [16] |
9 | Nathaniel Hieter | [3] |
10 | Ahmed Ispahani | [4] [5] |
11 | Michael A. Kazda | [12] |
12 | Prabhakar Kudva | [6] [9] |
13 | Sarvesh H. Kulkarni | [11] |
14 | Mabel T. Kung | [4] |
15 | Jagannathan Narasimhan | [16] |
16 | Theresa A. Nix | [2] |
17 | Peter J. Osler | [3] |
18 | David Z. Pan (David Zhigang Pan) | [11] [13] [15] |
19 | Emile J. Pilafidis | [4] [5] |
20 | Ruchir Puri | [8] [9] [10] [11] [12] [17] |
21 | Lakshmi N. Reddy | [3] [12] |
22 | Haoxing Ren | [13] [15] |
23 | Ashish Srivastava | [11] |
24 | Leon Stok | [3] [6] [9] [11] [17] |
25 | Andrew J. Sullivan | [3] |
26 | Dennis Sylvester | [11] |
27 | Louise Trevillyan | [12] |