2008 |
8 | EE | Jianjiang Ceng,
Jerónimo Castrillón,
Weihua Sheng,
Hanno Scharwächter,
Rainer Leupers,
Gerd Ascheid,
Heinrich Meyr,
Tsuyoshi Isshiki,
Hiroaki Kunieda:
MAPS: an integrated framework for MPSoC application parallelization.
DAC 2008: 754-759 |
2007 |
7 | EE | Hanno Scharwächter,
Jonghee M. Yoon,
Rainer Leupers,
Yunheung Paek,
Gerd Ascheid,
Heinrich Meyr:
A code-generator generator for multi-output instructions.
CODES+ISSS 2007: 131-136 |
6 | EE | Hanno Scharwächter,
David Kammler,
Andreas Wieferink,
Manuel Hohenauer,
Kingshuk Karuri,
Jianjiang Ceng,
Rainer Leupers,
Gerd Ascheid,
Heinrich Meyr:
ASIP architecture exploration for efficient IPSec encryption: A case study.
ACM Trans. Embedded Comput. Syst. 6(2): (2007) |
2006 |
5 | EE | Hanno Scharwächter,
Manuel Hohenauer,
Rainer Leupers,
Gerd Ascheid,
Heinrich Meyr:
An interprocedural code optimization technique for network processors using hardware multi-threading support.
DATE 2006: 919-924 |
2005 |
4 | EE | Mohammad Mostafizur Rahman Mozumdar,
Kingshuk Karuri,
Anupam Chattopadhyay,
Stefan Kraemer,
Hanno Scharwächter,
Heinrich Meyr,
Gerd Ascheid,
Rainer Leupers:
Instruction Set Customization of Application Specific Processors for Network Processing: A Case Study.
ASAP 2005: 154-160 |
2004 |
3 | EE | Gunnar Braun,
Achim Nohl,
Weihua Sheng,
Jianjiang Ceng,
Manuel Hohenauer,
Hanno Scharwächter,
Rainer Leupers,
Heinrich Meyr:
A novel approach for flexible and consistent ADL-driven ASIP design.
DAC 2004: 717-722 |
2 | EE | Manuel Hohenauer,
Hanno Scharwächter,
Kingshuk Karuri,
Oliver Wahlen,
Tim Kogel,
Rainer Leupers,
Gerd Ascheid,
Heinrich Meyr,
Gunnar Braun,
Hans van Someren:
A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models.
DATE 2004: 1276-1283 |
1 | EE | Hanno Scharwächter,
David Kammler,
Andreas Wieferink,
Manuel Hohenauer,
Kingshuk Karuri,
Jianjiang Ceng,
Rainer Leupers,
Gerd Ascheid,
Heinrich Meyr:
ASIP Architecture Exploration for Efficient Ipsec Encryption: A Case Study.
SCOPES 2004: 33-46 |