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Sudeep Pasricha

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2009
28EESudeep Pasricha, Nikil Dutt, Fadi J. Kurdahi: Exploring Carbon Nanotube Bundle Global Interconnects for Chip Multiprocessor Applications. VLSI Design 2009: 499-504
27EESudeep Pasricha, Young-Hwan Park, Nikil D. Dutt, Fadi J. Kurdahi: System-level PVT variation-aware power exploration of on-chip communication architectures. ACM Trans. Design Autom. Electr. Syst. 14(2): (2009)
26EEDoosan Cho, Sudeep Pasricha, Ilya Issenin, Nikil D. Dutt, Minwook Ahn, Yunheung Paek: Adaptive Scratch Pad Memory Management for Dynamic Behavior of Multimedia Applications. IEEE Trans. on CAD of Integrated Circuits and Systems 28(4): 554-567 (2009)
2008
25EESudeep Pasricha, Nikil Dutt: ORB: An on-chip optical ring bus communication architecture for multi-processor systems-on-chip. ASP-DAC 2008: 789-794
24EEYoung-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi, Nikil Dutt: Methodology for multi-granularity embedded processor power model generation for an ESL design flow. CODES+ISSS 2008: 255-260
23EEHouman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, Alexander V. Veidenbaum: Dynamic register file resizing and frequency scaling to improve embedded processor performance and energy-delay efficiency. DAC 2008: 68-71
22EELuis Angel D. Bathen, Nikil D. Dutt, Sudeep Pasricha: A framework for memory-aware multimedia application mapping on chip-multiprocessors. ESTImedia 2008: 89-94
21EEDoosan Cho, Sudeep Pasricha, Ilya Issenin, Nikil Dutt, Yunheung Paek, SunJun Ko: Compiler driven data layout optimization for regular/irregular array access patterns. LCTES 2008: 41-50
20EEHouman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, Alexander V. Veidenbaum: Improving performance and reducing energy-delay with adaptive resource resizing for out-of-order embedded processors. LCTES 2008: 71-78
19EESudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi, Nikil Dutt: Incorporating PVT Variations in System-Level Power Exploration of On-Chip Communication Architectures. VLSI Design 2008: 363-370
18EESudeep Pasricha, Nikil Dutt, Mohamed Ben-Romdhane: Fast exploration of bus-based communication architectures at the CCATB abstraction. ACM Trans. Embedded Comput. Syst. 7(2): (2008)
2007
17EEYoung-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi, Nikil Dutt: System level power estimation methodology with H.264 decoder prediction IP case study. ICCD 2007: 601-608
16EENikil Dutt, Kaustav Banerjee, Luca Benini, Kanishka Lahiri, Sudeep Pasricha: Tutorial 5: SoC Communication Architectures: Technology, Current Practice, Research, and Trends. VLSI Design 2007: 8
15EESudeep Pasricha, Nikil D. Dutt: A Framework for Cosynthesis of Memory and Communication Architectures for MPSoC. IEEE Trans. on CAD of Integrated Circuits and Systems 26(3): 408-420 (2007)
14EESudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdhane: BMSYN: Bus Matrix Communication Architecture Synthesis for MPSoC. IEEE Trans. on CAD of Integrated Circuits and Systems 26(8): 1454-1464 (2007)
2006
13EESudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdhane: Constraint-driven bus matrix synthesis for MPSoC. ASP-DAC 2006: 30-35
12EESudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi, Nikil D. Dutt: System-level power-performance trade-offs in bus matrix communication architecture synthesis. CODES+ISSS 2006: 300-305
11EESudeep Pasricha, Nikil D. Dutt: COSMECA: application specific co-synthesis of memory and communication architectures for MPSoC. DATE 2006: 700-705
10EEGabor Madl, Sudeep Pasricha, Luis Angel D. Bathen, Nikil Dutt, Qiang Zhu: Formal performance evaluation of AMBA-based system-on-chip designs. EMSOFT 2006: 311-320
9EESudeep Pasricha, Nikil D. Dutt, Elaheh Bozorgzadeh, Mohamed Ben-Romdhane: FABSYN: floorplan-aware bus architecture synthesis. IEEE Trans. VLSI Syst. 14(3): 241-253 (2006)
2005
8EESudeep Pasricha, Mohamed Ben-Romdhane: Using TLM for Exploring Bus-based SoC Communication Architectures. ASAP 2005: 79-85
7EESudeep Pasricha, Nikil Dutt, Mohamed Ben-Romdhane: Automated throughput-driven synthesis of bus-based communication architectures. ASP-DAC 2005: 495-498
6EESudeep Pasricha, Nikil D. Dutt, Elaheh Bozorgzadeh, Mohamed Ben-Romdhane: Floorplan-aware automated synthesis of bus-based communication architectures. DAC 2005: 565-570
2004
5EESudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdhane: Fast exploration of bus-based on-chip communication architectures. CODES+ISSS 2004: 242-247
4EESudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdhane: Extending the transaction level modeling approach for fast communication architecture exploration. DAC 2004: 113-118
3EESudeep Pasricha, Manev Luthra, Shivajit Mohapatra, Nikil D. Dutt, Nalini Venkatasubramanian: Dynamic Backlight Adaptation for Low-Power Handheld Devices. IEEE Design & Test of Computers 21(5): 398-405 (2004)
2003
2 Sudeep Pasricha, Shivajit Mohapatra, Manev Luthra, Nikil D. Dutt, Nalini Venkatasubramanian: Reducing Backlight Power Consumption for Streaming Video Applications on Mobile Handheld Devices. ESTImedia 2003: 11-17
1EESudeep Pasricha, Alexander V. Veidenbaum: Improving Branch Prediction Accuracy in Embedded Processors in the Presence of Context Switches. ICCD 2003: 526-531

Coauthor Index

1Minwook Ahn [26]
2Kaustav Banerjee [16]
3Luis Angel D. Bathen [10] [22]
4Mohamed Ben-Romdhane [4] [5] [6] [7] [8] [9] [13] [14] [18]
5Luca Benini [16]
6Elaheh Bozorgzadeh (Eli Bozorgzadeh) [6] [9]
7Doosan Cho [21] [26]
8Nikil D. Dutt (Nikil Dutt) [2] [3] [4] [5] [6] [7] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [21] [22] [24] [25] [26] [27] [28]
9Houman Homayoun [20] [23]
10Ilya Issenin [21] [26]
11SunJun Ko [21]
12Fadi J. Kurdahi [12] [17] [19] [24] [27] [28]
13Kanishka Lahiri [16]
14Manev Luthra [2] [3]
15Gabor Madl [10]
16Mohammad A. Makhzan [20] [23]
17Shivajit Mohapatra [2] [3]
18Yunheung Paek [21] [26]
19Young-Hwan Park [12] [17] [19] [24] [27]
20Alexander V. Veidenbaum [1] [20] [23]
21Nalini Venkatasubramanian [2] [3]
22Qiang Zhu [10]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)