| 2007 |
|---|
| 9 | EE | Peter Wohl,
John A. Waicukauski,
Sanjay Patel:
Automated Design and Insertion of Optimal One-Hot Bus Encoders.
VTS 2007: 409-415 |
| 2006 |
|---|
| 8 | EE | Mark D. Dunlop,
Andrew Glen,
Sunil Motaparti,
Sanjay Patel:
AdapTex: contextually adaptive text entry for mobiles.
Mobile HCI 2006: 265 |
| 2005 |
|---|
| 7 | EE | Peter Wohl,
John A. Waicukauski,
Sanjay Patel,
Cy Hay,
Emil Gizdarski,
Ben Mathew:
Hierarchical Compactor Design for Diagnosis in Deterministic Logic BIST.
VTS 2005: 359-365 |
| 2004 |
|---|
| 6 | EE | Peter Wohl,
John A. Waicukauski,
Sanjay Patel:
Scalable selector architecture for x-tolerant deterministic BIST.
DAC 2004: 934-939 |
| 5 | EE | Ellen Salmon,
Adina Tarshish,
Nancy Palm,
Sanjay Patel,
Marty Saletta,
Ed Vanderlan,
Mike Rouch,
Lisa Burns,
Daniel C. Duffy,
Robert Caine,
Randall Golay,
Jeff Paffel,
Nathan Schumann:
Hierarchical Storage Management at the NASA Center for Computational Sciences: From Unitree to SAM-QFS.
MSST 2004: 177-183 |
| 2003 |
|---|
| 4 | EE | Peter Wohl,
John A. Waicukauski,
Sanjay Patel,
Minesh B. Amin:
Efficient compression and application of deterministic patterns in a logic BIST architecture.
DAC 2003: 566-569 |
| 3 | EE | Peter Wohl,
John A. Waicukauski,
Sanjay Patel,
Minesh B. Amin:
X-Tolerant Compression And Application of Scan-ATPG Patterns In A BIST Architecture.
ITC 2003: 727-736 |
| 2002 |
|---|
| 2 | EE | Peter Wohl,
John A. Waicukauski,
Sanjay Patel,
Gregory A. Maston:
Effective diagnostics through interval unloads in a BIST environment.
DAC 2002: 249-254 |
| 1999 |
|---|
| 1 | | Janusz Rajski,
Jerzy Tyszer,
Sanjay Patel:
Built-In Self-Test for Systems on Silicon.
VLSI Design 1999: 609-610 |
