| 2006 |
|---|
| 5 | EE | Chandramouli Visweswariah,
K. Ravindran,
K. Kalafala,
Steven G. Walker,
S. Narayan,
Daniel K. Beece,
J. Piaget,
N. Venkateswaran,
Jeffrey G. Hemmett:
First-Order Incremental Block-Based Statistical Timing Analysis.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2170-2180 (2006) |
| 4 | EE | Jochen A. G. Jess,
K. Kalafala,
Srinath R. Naidu,
Ralph H. J. M. Otten,
Chandramouli Visweswariah:
Statistical Timing for Parametric Yield Prediction of Digital Integrated Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(11): 2376-2392 (2006) |
| 2004 |
|---|
| 3 | EE | Chandramouli Visweswariah,
K. Ravindran,
K. Kalafala,
Steven G. Walker,
S. Narayan:
First-order incremental block-based statistical timing analysis.
DAC 2004: 331-336 |
| 2003 |
|---|
| 2 | EE | Jochen A. G. Jess,
K. Kalafala,
Srinath R. Naidu,
Ralph H. J. M. Otten,
Chandramouli Visweswariah:
Statistical timing for parametric yield prediction of digital integrated circuits.
DAC 2003: 932-937 |
| 1997 |
|---|
| 1 | | George Nagy,
Ashok Samal,
Sharad C. Seth,
T. Fisher,
E. Guthmann,
K. Kalafala,
Luyang Li,
Prateek Sarkar,
S. Sivasubramaniam,
Yihong Xu:
A Prototype for Adaptive Association of Street Names with Streets on Maps.
GREC 1997: 302-313 |
