| |
| 2005 | ||
|---|---|---|
| 3 | EE | Anup Kumar Sultania, Dennis Sylvester, Sachin S. Sapatnekar: Gate oxide leakage and delay tradeoffs for dual-T/sub ox/ circuits. IEEE Trans. VLSI Syst. 13(12): 1362-1375 (2005) |
| 2004 | ||
| 2 | EE | Anup Kumar Sultania, Dennis Sylvester, Sachin S. Sapatnekar: Tradeoffs between date oxide leakage and delay for dual Tox circuits. DAC 2004: 761-766 |
| 1 | EE | Anup Kumar Sultania, Dennis Sylvester, Sachin S. Sapatnekar: Transistor and Pin Reordering for Gate Oxide Leakage Reduction in Dual T{ox} Circuits. ICCD 2004: 228-233 |
| 1 | Sachin S. Sapatnekar | [1] [2] [3] |
| 2 | Dennis Sylvester | [1] [2] [3] |