2008 |
17 | EE | Reinaldo A. Bergamaschi,
Guoling Han,
Alper Buyuktosunoglu,
Hiren D. Patel,
Indira Nair,
Gero Dittmann,
Geert Janssen,
Nagu R. Dhanwada,
Zhigang Hu,
Pradip Bose,
John A. Darringer:
Exploring power management in multi-core systems.
ASP-DAC 2008: 708-713 |
2007 |
16 | EE | Reinaldo A. Bergamaschi,
Indira Nair,
Gero Dittmann,
Hiren D. Patel,
Geert Janssen,
Nagu R. Dhanwada,
Alper Buyuktosunoglu,
Emrah Acar,
Gi-Joon Nam,
Dorothy Kucar,
Pradip Bose,
John A. Darringer,
Guoling Han:
Performance modeling for early analysis of multi-core systems.
CODES+ISSS 2007: 209-214 |
15 | EE | John A. Darringer:
Multi-Core Design Automation Challenges.
DAC 2007: 760-764 |
2006 |
14 | EE | Jeff Parkhurst,
John A. Darringer,
Bill Grundmann:
From single core to multi-core: preparing for a new exponential.
ICCAD 2006: 67-72 |
2005 |
13 | EE | Subhrajit Bhattacharya,
John A. Darringer,
Daniel L. Ostapko,
Youngsoo Shin:
A Mask Reuse Methodology for Reducing System-on-a-Chip Cost.
ISQED 2005: 482-487 |
2004 |
12 | EE | Shishpal Rawat,
William H. Joyner Jr.,
John A. Darringer,
Daniel Gajski,
Pat O. Pistilli,
Hugo De Man,
Carl Harris,
James Solomon:
Were the good old days all that good?: EDA then and now.
DAC 2004: 543 |
2003 |
11 | EE | Reinaldo A. Bergamaschi,
Youngsoo Shin,
Nagu R. Dhanwada,
Subhrajit Bhattacharya,
William E. Dougherty,
Indira Nair,
John A. Darringer,
Sarala Paliwal:
SEAS: a system for early analysis of SoCs.
CODES+ISSS 2003: 150-155 |
2002 |
10 | EE | John A. Darringer,
Reinaldo A. Bergamaschi,
Subhrajit Bhattacharya,
Daniel Brand,
Andreas Herkersdorf,
Joseph K. Morrell,
Indira Nair,
Patricia Sagmeister,
Youngsoo Shin:
Early analysis tools for system-on-a-chip design.
IBM Journal of Research and Development 46(6): 691-708 (2002) |
2001 |
9 | EE | Steven E. Schulz,
Georgia Marszalek,
Greg Hinckley,
Greg Spirakis,
Karen Vahtra,
John A. Darringer,
J. George Janac,
Handel H. Jones:
Panel: What Drives EDA Innovation?
DAC 2001: 790-791 |
2000 |
8 | EE | John A. Darringer,
Daniel Brand,
John V. Gerbi,
William H. Joyner Jr.,
Louise Trevillyan:
LSS: A system for production logic synthesis.
IBM Journal of Research and Development 44(1): 157-166 (2000) |
7 | EE | John A. Darringer,
Evan E. Davidson,
David J. Hathaway,
Bernd Koenemann,
Mark A. Lavin,
Joseph K. Morrell,
Khalid Rahmat,
Wolfgang Roesner,
Erich C. Schanzenbach,
Gustavo Tellez,
Louise Trevillyan:
EDA in IBM: past, present, and future.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(12): 1476-1497 (2000) |
1993 |
6 | EE | John A. Darringer:
Where in the World Should CAD Software be Made? (Panel Abstract).
DAC 1993: 742 |
1989 |
5 | | John A. Darringer:
Advanced Design Automation in Industry.
IFIP Congress 1989: 527 |
1985 |
4 | EE | John A. Darringer,
Daniel Brand,
William H. Joyner Jr.,
Louise Trevillyan,
John V. Gerbi:
Production logic synthesis.
ACM Conference on Computer Science 1985: 13-16 |
1984 |
3 | | John A. Darringer:
Automated Logic Synthesis.
VLSI Engineering 1984: 177-186 |
2 | | John A. Darringer,
Daniel Brand,
John V. Gerbi,
William H. Joyner Jr.,
Louise Trevillyan:
LSS: A System for Production Logic Synthesis.
IBM Journal of Research and Development 28(5): 537-545 (1984) |
1981 |
1 | | John A. Darringer,
William H. Joyner Jr.,
C. Leonard Berman,
Louise Trevillyan:
Logic Synthesis Through Local Transformations.
IBM Journal of Research and Development 25(4): 272-280 (1981) |