2009 |
12 | EE | Gaurav Mittal,
David Zaretsky,
Prithviraj Banerjee:
Streaming implementation of a sequential decompression algorithm on an FPGA.
FPGA 2009: 283 |
11 | EE | Lei Gao,
David Zaretsky,
Gaurav Mittal,
Dan Schonfeld,
Prith Banerjee:
A software pipelining algorithm in high-level synthesis for FPGA architectures.
ISQED 2009: 297-302 |
2007 |
10 | EE | David Zaretsky,
Gaurav Mittal,
Robert P. Dick,
Prith Banerjee:
Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs.
ISQED 2007: 595-601 |
9 | EE | Gaurav Mittal,
David Zaretsky,
Xiaoyong Tang,
Prithviraj Banerjee:
An Overview of a Compiler for Mapping Software Binaries to Hardware.
IEEE Trans. VLSI Syst. 15(11): 1177-1190 (2007) |
2006 |
8 | EE | David Zaretsky,
Gaurav Mittal,
Robert P. Dick,
Prith Banerjee:
Dynamic Template Generation for Resource Sharing in Control and Data Flow Graphs.
VLSI Design 2006: 465-468 |
2005 |
7 | EE | Gaurav Mittal,
David Zaretsky,
Gokhan Memik,
Prith Banerjee:
Automatic extraction of function bodies from software binaries.
ASP-DAC 2005: 928-931 |
6 | EE | David Zaretsky,
Gaurav Mittal,
Robert P. Dick,
Prith Banerjee:
Generation of Control and Data Flow Graphs from Scheduled and Pipelined Assembly Code.
LCPC 2005: 76-90 |
2004 |
5 | EE | David Zaretsky,
Gaurav Mittal,
Xiaoyong Tang,
Prithviraj Banerjee:
Evaluation of scheduling and allocation algorithms while mapping assembly code onto FPGAs.
ACM Great Lakes Symposium on VLSI 2004: 397-400 |
4 | EE | Gaurav Mittal,
David Zaretsky,
Xiaoyong Tang,
Prithviraj Banerjee:
Automatic translation of software binaries onto FPGAs.
DAC 2004: 389-394 |
3 | EE | David Zaretsky,
Gaurav Mittal,
Xiaoyong Tang,
Prithviraj Banerjee:
Overview of the FREEDOM Compiler for Mapping DSP Software to FPGAs.
FCCM 2004: 37-46 |
2 | | Prithviraj Banerjee,
Malay Haldar,
Anshuman Nayak,
Victor Kim,
Vikram Saxena,
Steven Parkes,
Debabrata Bagchi,
Satrajit Pal,
Nikhil Tripathi,
David Zaretsky,
R. Anderson,
J. R. Uribe:
Overview of a compiler for synthesizing MATLAB programs onto FPGAs.
IEEE Trans. VLSI Syst. 12(3): 312-324 (2004) |
2000 |
1 | EE | Prithviraj Banerjee,
U. Nagaraj Shenoy,
Alok N. Choudhary,
Scott Hauck,
C. Bachmann,
Malay Haldar,
Pramod G. Joisha,
Alex K. Jones,
Abhay Kanhere,
Anshuman Nayak,
S. Periyacheri,
M. Walkden,
David Zaretsky:
A MATLAB Compiler for Distributed, Heterogeneous, Reconfigurable Computing Systems.
FCCM 2000: 39-48 |