| 2009 |
| 13 | EE | Bo-Zhou Chen,
Hung-Ming Chen,
Li-Da Huang,
Po-Cheng Pan:
A stochastic-based efficient critical area extractor on OpenAccess platform.
ACM Great Lakes Symposium on VLSI 2009: 197-202 |
| 2008 |
| 12 | EE | Lun-Chun Wei,
Hung-Ming Chen,
Li-Da Huang,
Sarah Songjie Xu:
Efficient and optimal post-layout double-cut via insertion by network relaxation and min-cost maximum flow.
ACM Great Lakes Symposium on VLSI 2008: 359-362 |
| 2007 |
| 11 | EE | Hua Xiang,
Liang Deng,
Li-Da Huang,
Martin D. F. Wong:
OPC-Friendly Bus Driven Floorplanning.
ISQED 2007: 847-852 |
| 2005 |
| 10 | EE | Gang Xu,
Li-Da Huang,
David Z. Pan,
Martin D. F. Wong:
Redundant-via enhanced maze routing for yield improvement.
ASP-DAC 2005: 1148-1151 |
| 9 | EE | Hung-Ming Chen,
Li-Da Huang,
I-Min Liu,
Martin D. F. Wong:
Simultaneous power supply planning and noise avoidance in floorplan design.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(4): 578-587 (2005) |
| 2004 |
| 8 | EE | Li-Da Huang,
Martin D. F. Wong:
Optical proximity correction (OPC): friendly maze routing.
DAC 2004: 186-191 |
| 7 | EE | Hung-Ming Chen,
I-Min Liu,
Martin D. F. Wong,
Muzhou Shao,
Li-Da Huang:
I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design.
ICCD 2004: 562-567 |
| 6 | EE | Li-Da Huang,
Xiaoping Tang,
Hua Xiang,
Martin D. F. Wong,
I-Min Liu:
A polynomial time-optimal diode insertion/routing algorithm for fixing antenna problem [IC layout].
IEEE Trans. on CAD of Integrated Circuits and Systems 23(1): 141-147 (2004) |
| 2003 |
| 5 | EE | Li-Da Huang,
Hung-Ming Chen,
D. F. Wong:
Global Wire Bus Configuration with Minimum Delay Uncertainty.
DATE 2003: 10050-10055 |
| 4 | EE | Muzhou Shao,
Martin D. F. Wong,
Huijing Cao,
Youxin Gao,
Li-Pen Yuan,
Li-Da Huang,
Seokjin Lee:
Explicit gate delay model for timing evaluation.
ISPD 2003: 32-38 |
| 3 | EE | Li-Da Huang,
Minghorng Lai,
Martin D. F. Wong,
Youxin Gao:
Maze routing with buffer insertion under transition time constraints.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(1): 91-95 (2003) |
| 2002 |
| 2 | EE | Li-Da Huang,
Xiaoping Tang,
Hua Xiang,
D. F. Wong,
I-Min Liu:
A Polynomial Time Optimal Diode Insertion/Routing Algorithm for Fixing Antenna Problem.
DATE 2002: 470-477 |
| 1 | EE | Li-Da Huang,
Minghorng Lai,
D. F. Wong,
Youxin Gao:
Maze Routing with Buffer Insertion under Transition Time Constraints.
DATE 2002: 702-707 |