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Li-Da Huang

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2009
13EEBo-Zhou Chen, Hung-Ming Chen, Li-Da Huang, Po-Cheng Pan: A stochastic-based efficient critical area extractor on OpenAccess platform. ACM Great Lakes Symposium on VLSI 2009: 197-202
2008
12EELun-Chun Wei, Hung-Ming Chen, Li-Da Huang, Sarah Songjie Xu: Efficient and optimal post-layout double-cut via insertion by network relaxation and min-cost maximum flow. ACM Great Lakes Symposium on VLSI 2008: 359-362
2007
11EEHua Xiang, Liang Deng, Li-Da Huang, Martin D. F. Wong: OPC-Friendly Bus Driven Floorplanning. ISQED 2007: 847-852
2005
10EEGang Xu, Li-Da Huang, David Z. Pan, Martin D. F. Wong: Redundant-via enhanced maze routing for yield improvement. ASP-DAC 2005: 1148-1151
9EEHung-Ming Chen, Li-Da Huang, I-Min Liu, Martin D. F. Wong: Simultaneous power supply planning and noise avoidance in floorplan design. IEEE Trans. on CAD of Integrated Circuits and Systems 24(4): 578-587 (2005)
2004
8EELi-Da Huang, Martin D. F. Wong: Optical proximity correction (OPC): friendly maze routing. DAC 2004: 186-191
7EEHung-Ming Chen, I-Min Liu, Martin D. F. Wong, Muzhou Shao, Li-Da Huang: I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design. ICCD 2004: 562-567
6EELi-Da Huang, Xiaoping Tang, Hua Xiang, Martin D. F. Wong, I-Min Liu: A polynomial time-optimal diode insertion/routing algorithm for fixing antenna problem [IC layout]. IEEE Trans. on CAD of Integrated Circuits and Systems 23(1): 141-147 (2004)
2003
5EELi-Da Huang, Hung-Ming Chen, D. F. Wong: Global Wire Bus Configuration with Minimum Delay Uncertainty. DATE 2003: 10050-10055
4EEMuzhou Shao, Martin D. F. Wong, Huijing Cao, Youxin Gao, Li-Pen Yuan, Li-Da Huang, Seokjin Lee: Explicit gate delay model for timing evaluation. ISPD 2003: 32-38
3EELi-Da Huang, Minghorng Lai, Martin D. F. Wong, Youxin Gao: Maze routing with buffer insertion under transition time constraints. IEEE Trans. on CAD of Integrated Circuits and Systems 22(1): 91-95 (2003)
2002
2EELi-Da Huang, Xiaoping Tang, Hua Xiang, D. F. Wong, I-Min Liu: A Polynomial Time Optimal Diode Insertion/Routing Algorithm for Fixing Antenna Problem. DATE 2002: 470-477
1EELi-Da Huang, Minghorng Lai, D. F. Wong, Youxin Gao: Maze Routing with Buffer Insertion under Transition Time Constraints. DATE 2002: 702-707

Coauthor Index

1Huijing Cao [4]
2Bo-Zhou Chen [13]
3Hung-Ming Chen [5] [7] [9] [12] [13]
4Liang Deng [11]
5Youxin Gao [1] [3] [4]
6Minghorng Lai [1] [3]
7Seokjin Lee [4]
8I-Min Liu [2] [6] [7] [9]
9David Z. Pan (David Zhigang Pan) [10]
10Po-Cheng Pan [13]
11Muzhou Shao [4] [7]
12Xiaoping Tang [2] [6]
13Lun-Chun Wei [12]
14Martin D. F. Wong (D. F. Wong) [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]
15Hua Xiang [2] [6] [11]
16Gang Xu [10]
17Sarah Songjie Xu [12]
18Li-Pen Yuan [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)