Vivek De

2008
61	EE	Hamed F. Dadgour, Vivek De, Kaustav Banerjee: Statistical modeling of metal-gate work-function variability in emerging device technologies and implications for circuit design. ICCAD 2008: 270-277
60	EE	DiaaEldin Khalil, Yehea I. Ismail, Muhammad M. Khellah, Tanay Karnik, Vivek De: Analytical Model for the Propagation Delay of Through Silicon Vias. ISQED 2008: 553-556
2007
59	EE	Steven M. Burns, Mahesh Ketkar, Noel Menezes, Keith A. Bowman, James Tschanz, Vivek De: Comparative Analysis of Conventional and Statistical Design Techniques. DAC 2007: 238-243
58	EE	Navid Azizi, Muhammad M. Khellah, Vivek De, Farid N. Najm: Variations-Aware Low-Power Design and Block Clustering With Voltage Scaling. IEEE Trans. VLSI Syst. 15(7): 746-757 (2007)
2006
57	EE	Yibin Ye, Muhammad M. Khellah, Dinesh Somasekhar, Vivek De: Evaluation of differential vs. single-ended sensing and asymmetric cells in 90 nm logic technology for on-chip caches. ISCAS 2006
56	EE	Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, Vivek De: Reducing the data switching activity of serialized datastreams. ISCAS 2006
55	EE	Keith A. Bowman, James Tschanz, Muhammad M. Khellah, Maged Ghoneima, Yehea I. Ismail, Vivek De: Time-borrowing multi-cycle on-chip interconnects for delay variation tolerance. ISLPED 2006: 79-84
54	EE	Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, Vivek De: Reducing the Data Switching Activity on Serial Link Buses. ISQED 2006: 425-432
53	EE	Maryam Ashouei, Abhijit Chatterjee, Adit D. Singh, Vivek De, T. M. Mak: Statistical Estimation of Correlated Leakage Power Variation and Its Application to Leakage-Aware Design. VLSI Design 2006: 606-612
52	EE	Osman S. Unsal, James Tschanz, Keith A. Bowman, Vivek De, Xavier Vera, Antonio González, Oguz Ergin: Impact of Parameter Variations on Circuits and Microarchitecture. IEEE Micro 26(6): 30-39 (2006)
51	EE	Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, James Tschanz, Vivek De: Formal derivation of optimal active shielding for low-power on-chip buses. IEEE Trans. on CAD of Integrated Circuits and Systems 25(5): 821-836 (2006)
2005
50	EE	Navid Azizi, Muhammad M. Khellah, Vivek De, Farid N. Najm: Variations-aware low-power design with voltage scaling. DAC 2005: 529-534
49	EE	James Tschanz, Keith A. Bowman, Vivek De: Variation-tolerant circuits: circuit solutions and techniques. DAC 2005: 762-763
48		Peter Suaris, Taeho Kgil, Keith A. Bowman, Vivek De, Trevor N. Mudge: Total power-optimal pipelining and parallel processing under process variations in nanometer technology. ICCAD 2005: 535-540
47		Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, James Tschanz, Vivek De: Serial-link bus: a low-power on-chip bus architecture. ICCAD 2005: 541-546
46	EE	Maryam Ashouei, Abhijit Chatterjee, Adit D. Singh, Vivek De: A Dual-Vt Layout Approach for Statistical Leakage Variability Minimization in Nanometer CMOS. ICCD 2005: 567-573
45	EE	Volkan Kursun, Gerhard Schrom, Vivek De, Eby G. Friedman, Siva Narendra: Cascode buffer for monolithic voltage conversion operating at high input supply voltages. ISCAS (1) 2005: 464-467
44	EE	Yehea I. Ismail, Muhammad M. Khellah, Maged Ghoneima, James Tschanz, Yibin Ye, Vivek De: Skewing adjacent line repeaters to reduce the delay and energy dissipation of on-chip buses. ISCAS (1) 2005: 592-595
43	EE	James Tschanz, Siva Narendra, Ali Keshavarzi, Vivek De: Adaptive circuit techniques to minimize variation impacts on microprocessor performance and power. ISCAS (1) 2005: 9-12
42	EE	Ali Keshavarzi, Gerhard Schrom, Stephen Tang, Sean Ma, Keith A. Bowman, Sunit Tyagi, Kevin Zhang, Tom Linton, Nagib Hakim, Steven G. Duvall, John Brews, Vivek De: Measurements and modeling of intrinsic fluctuations in MOSFET threshold voltage. ISLPED 2005: 26-29
41	EE	Volkan Kursun, Vivek De, Eby G. Friedman, Siva G. Narendra: Monolithic voltage conversion in low-voltage CMOS technologies. Microelectronics Journal 36(9): 863-867 (2005)
2004
40	EE	Arman Vassighi, Ali Keshavarzi, Siva Narendra, Gerhard Schrom, Yibin Ye, Seri Lee, Greg Chrysler, Manoj Sachdev, Vivek De: Design optimizations for microprocessors at low temperature. DAC 2004: 2-5
39	EE	Shekhar Borkar, Tanay Karnik, Vivek De: Design and reliability challenges in nanometer technologies. DAC 2004: 75
38	EE	Gerhard Schrom, Peter Hazucha, Jae-Hong Hahn, Volkan Kursun, Donald S. Gardner, Siva Narendra, Tanay Karnik, Vivek De: Feasibility of monolithic and 3D-stacked DC-DC converters for microprocessors in 90nm technology generation. ISLPED 2004: 263-268
37	EE	Volkan Kursun, Siva Narendra, Vivek De, Eby G. Friedman: High Input Voltage Step-Down DC-DC Converters for Integration in a Low Voltage CMOS Process. ISQED 2004: 517-521
2003
36	EE	Shekhar Borkar, Tanay Karnik, Siva Narendra, James Tschanz, Ali Keshavarzi, Vivek De: Parameter variations and impact on circuits and microarchitecture. DAC 2003: 338-342
35	EE	Wei Zhang, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Vivek De: Compiler Support for Reducing Leakage Energy Consumption. DATE 2003: 11146-11147
34	EE	Stephen Tang, Siva Narendra, Vivek De: Temperature and process invariant MOS-based reference current generation circuits for sub-1V operation. ISLPED 2003: 199-204
33	EE	Volkan Kursun, Siva Narendra, Vivek De, Eby G. Friedman: Monolithic DC-DC Converter Analysis And Mosfet Gate Voltage Optimization. ISQED 2003: 279-
32	EE	Volkan Kursun, Siva G. Narendra, Vivek De, Eby G. Friedman: Analysis of buck converters for on-chip integration with a dual supply voltage microprocessor. IEEE Trans. VLSI Syst. 11(3): 514-522 (2003)
31	EE	Vivek De, Luca Benini: Guest editorial. IEEE Trans. VLSI Syst. 11(5): 753-754 (2003)
30	EE	Ali Keshavarzi, Kaushik Roy, Charles F. Hawkins, Vivek De: Multiple-parameter CMOS IC testing with increased sensitivity for IDDQ. IEEE Trans. VLSI Syst. 11(5): 863-870 (2003)
2002
29		Kanad Ghose, Patrick H. Madden, Vivek De, Peter M. Kogge: Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, New York, NY, USA, April 18-19, 2002 ACM 2002
28		Vivek De, Mary Jane Irwin, Ingrid Verbauwhede, Christian Piguet: Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002 ACM 2002
27	EE	Tanay Karnik, Yibin Ye, James Tschanz, Liqiong Wei, Steven M. Burns, Venkatesh Govindarajulu, Vivek De, Shekhar Borkar: Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors. DAC 2002: 486-491
26	EE	George Sery, Shekhar Borkar, Vivek De: Life is CMOS: why chase the life after? DAC 2002: 78-83
25	EE	Tanay Karnik, Shekhar Borkar, Vivek De: Sub-90nm technologies: challenges and opportunities for CAD. ICCAD 2002: 203-206
24	EE	Siva Narendra, Vivek De, Shekhar Borkar, Dimitri Antoniadis, Anantha Chandrakasan: Full-chip sub-threshold leakage power prediction model for sub-0.18 µm CMOS. ISLPED 2002: 19-23
23	EE	Vivek De: Leakage-tolerant design techniques for high performance processors. ISPD 2002: 28-28
22	EE	Ron Wilson, Siva Narendra, Vivek De: Evening Panel Discussion: Process Variation: Is It Too Much to Handle? ISQED 2002: 213-
21	EE	Jaume Segura, Vivek De, Ali Keshavarzi: Challenges in Nanometric Technology Scaling: Trends and Projections. VTS 2002: 447-448
20	EE	Ali Keshavarzi, James Tschanz, Siva Narendra, Vivek De, W. Robert Daasch, Kaushik Roy, Manoj Sachdev, Charles F. Hawkins: Leakage and Process Variation Effects in Current Testing on Future CMOS Circuits. IEEE Design & Test of Computers 19(5): 36-43 (2002)
19	EE	Fatih Hamzaoglu, Yibin Ye, Ali Keshavarzi, Kevin Zhang, Siva Narendra, Shekhar Borkar, Mircea R. Stan, Vivek De: Analysis of dual-VT SRAM cells with full-swing single-ended bit line sensing for on-chip cache. IEEE Trans. VLSI Syst. 10(2): 91-95 (2002)
2001
18		Enrico Macii, Vivek De, Mary Jane Irwin: Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001, Huntington Beach, California, USA, 2001 ACM 2001
17	EE	James Tschanz, Siva Narendra, Zhanping Chen, Shekhar Borkar, Manoj Sachdev, Vivek De: Comparative delay and energy of single edge-triggered & dual edge-triggered pulsed flip-flops for high-performance microprocessors. ISLPED 2001: 147-152
16	EE	Siva Narendra, Vivek De, Dimitri Antoniadis, Anantha Chandrakasan, Shekhar Borkar: Scaling of stack effect and its application for leakage reduction. ISLPED 2001: 195-200
15	EE	Ali Keshavarzi, Sean Ma, Siva Narendra, B. Bloechel, K. Mistry, T. Ghani, Shekhar Borkar, Vivek De: Effectiveness of reverse body bias for leakage control in scaled dual Vt CMOS ICs. ISLPED 2001: 207-212
2000
14	EE	Vivek De, Shekhar Borkar: Low power and high performance design challenges in future technologies. ACM Great Lakes Symposium on VLSI 2000: 1-6
13	EE	Dinesh Somasekhar, Seung Hoon Choi, Kaushik Roy, Yibin Ye, Vivek De: Dynamic noise analysis in precharge-evaluate circuits. DAC 2000: 243
12		Ali Keshavarzi, Kaushik Roy, Charles F. Hawkins, Manoj Sachdev, K. Soumyanath, Vivek De: Multiple-parameter CMOS IC testing with increased sensitivity for I_DDQ. ITC 2000: 1051-1059
11	EE	Liqiong Wei, Kaushik Roy, Vivek De: Low Voltage Low Power CMOS Design Techniques for Deep Submicron ICs. VLSI Design 2000: 24-29
1999
10	EE	Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye, Vivek De: Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications. DAC 1999: 430-435
9	EE	Vivek De, Shekhar Borkar: Technology and design challenges for low power and high performance. ISLPED 1999: 163-168
8	EE	Ali Keshavarzi, Siva Narendra, Shekhar Borkar, Charles F. Hawkins, Kaushik Roy, Vivek De: Technology scaling behavior of optimum reverse body bias for standby leakage power reduction in CMOS IC's. ISLPED 1999: 252-254
7	EE	Liqiong Wei, Zhanping Chen, Kaushik Roy, Mark C. Johnson, Yibin Ye, Vivek De: Design and optimization of dual-threshold circuits for low-voltage low-power applications. IEEE Trans. VLSI Syst. 7(1): 16-24 (1999)
1998
6	EE	Liqiong Wei, Zhanping Chen, Mark Johnson, Kaushik Roy, Vivek De: Design and Optimization of Low Voltage High Performance Dual Threshold CMOS Circuits. DAC 1998: 489-494
1997
5	EE	Pankaj Pant, Vivek De, Abhijit Chatterjee: Device-Circuit Optimization for Minimal Energy and Power Consumption in CMOS Random Logic Networks. DAC 1997: 403-408
4	EE	Xinghai Tang, Vivek De, James D. Meindl: Intrinsic MOSFET parameter fluctuations due to random dopant placement. IEEE Trans. VLSI Syst. 5(4): 369-376 (1997)
1996
3	EE	Azeez J. Bhavnagarwala, Vivek De, Blanca Austin, James D. Meindl: Circuit techniques for low-power CMOS GSI. ISLPED 1996: 193-196
2	EE	Xinghai Tang, Vivek De, James D. Meindl: Effects of random MOSFET parameter fluctuations on total power consumption. ISLPED 1996: 233-236
1	EE	Vivek De, James D. Meindl: A dynamic energy recycling logic family for ultra-low-power gigascale integration (GSI). ISLPED 1996: 371-375

Coauthor Index

1	Dimitri Antoniadis	[16] [24]
2	Maryam Ashouei	[46] [53]
3	Blanca Austin	[3]
4	Navid Azizi	[50] [58]
5	Kaustav Banerjee	[61]
6	Luca Benini	[31]
7	Azeez J. Bhavnagarwala	[3]
8	B. Bloechel	[15]
9	Shekhar Y. Borkar (Shekhar Borkar)	[8] [9] [14] [15] [16] [17] [19] [24] [25] [26] [27] [36] [39]
10	Keith A. Bowman	[42] [48] [49] [52] [55] [59]
11	John Brews	[42]
12	Steven M. Burns	[27] [59]
13	Anantha Chandrakasan (Anantha P. Chandrakasan)	[16] [24]
14	Abhijit Chatterjee	[5] [46] [53]
15	Zhanping Chen	[6] [7] [10] [17]
16	Seung Hoon Choi	[13]
17	Greg Chrysler	[40]
18	W. Robert Daasch	[20]
19	Hamed F. Dadgour	[61]
20	Steven G. Duvall	[42]
21	Oguz Ergin	[52]
22	Eby G. Friedman	[32] [33] [37] [41] [45]
23	Donald S. Gardner	[38]
24	T. Ghani	[15]
25	Maged Ghoneima	[44] [47] [51] [54] [55] [56]
26	Kanad Ghose	[29]
27	Antonio González	[52]
28	Venkatesh Govindarajulu	[27]
29	Jae-Hong Hahn	[38]
30	Nagib Hakim	[42]
31	Fatih Hamzaoglu	[19]
32	Charles F. Hawkins	[8] [12] [20] [30]
33	Peter Hazucha	[38]
34	Mary Jane Irwin	[18] [28] [35]
35	Yehea I. Ismail	[44] [47] [51] [54] [55] [56] [60]
36	Mark Johnson	[6]
37	Mark C. Johnson	[7]
38	Mahmut T. Kandemir	[35]
39	Tanay Karnik	[25] [27] [36] [38] [39] [60]
40	Ali Keshavarzi	[8] [12] [15] [19] [20] [21] [30] [36] [40] [42] [43]
41	Mahesh Ketkar	[59]
42	Taeho Kgil	[48]
43	DiaaEldin Khalil	[60]
44	Muhammad M. Khellah	[44] [47] [50] [51] [54] [55] [56] [57] [58] [60]
45	Peter M. Kogge	[29]
46	Volkan Kursun	[32] [33] [37] [38] [41] [45]
47	Seri Lee	[40]
48	Tom Linton	[42]
49	Sean Ma	[15] [42]
50	Enrico Macii	[18]
51	Patrick H. Madden	[29]
52	T. M. Mak	[53]
53	James D. Meindl	[1] [2] [3] [4]
54	Noel Menezes	[59]
55	K. Mistry	[15]
56	Trevor N. Mudge	[48]
57	Farid N. Najm	[50] [58]
58	Siva Narendra	[8] [15] [16] [17] [19] [20] [22] [24] [33] [34] [36] [37] [38] [40] [43] [45]
59	Siva G. Narendra	[32] [41]
60	Pankaj Pant	[5]
61	Christian Piguet	[28]
62	Kaushik Roy	[6] [7] [8] [10] [11] [12] [13] [20] [30]
63	Manoj Sachdev	[12] [17] [20] [40]
64	Gerhard Schrom	[38] [40] [42] [45]
65	Jaume Segura	[21]
66	George Sery	[26]
67	Adit D. Singh	[46] [53]
68	Dinesh Somasekhar	[13] [57]
69	K. Soumyanath	[12]
70	Mircea R. Stan	[19]
71	Peter Suaris (Peter Ramyalal Suaris)	[48]
72	Stephen Tang	[34] [42]
73	Xinghai Tang	[2] [4]
74	James Tschanz	[17] [20] [27] [36] [43] [44] [47] [49] [51] [52] [55] [59]
75	Sunit Tyagi	[42]
76	Osman S. Unsal	[52]
77	Arman Vassighi	[40]
78	Xavier Vera	[52]
79	Ingrid Verbauwhede	[28]
80	Narayanan Vijaykrishnan (Vijaykrishnan Narayanan)	[35]
81	Liqiong Wei	[6] [7] [10] [11] [27]
82	Ron Wilson	[22]
83	Yibin Ye	[7] [10] [13] [19] [27] [40] [44] [57]
84	Kevin Zhang	[19] [42]
85	Wei Zhang	[35]