| 2008 |
|---|
| 9 | EE | Sanghamitra Roy,
Yu Hen Hu,
Charlie Chung-Ping Chen,
Shih-Pin Hung,
Tse-Yu Chiang,
Jiuan-Guei Tseng:
An optimal algorithm for sizing sequential circuits for industrial library based designs.
ASP-DAC 2008: 148-151 |
| 2007 |
|---|
| 8 | EE | Sanghamitra Roy,
Charlie Chung-Ping Chen:
SmartSmooth: A linear time convexity preserving smoothing algorithm for numerically convex data with application to VLSI design.
ASP-DAC 2007: 559-564 |
| 7 | EE | Sanghamitra Roy,
Weijen Chen,
Charlie Chung-Ping Chen,
Yu Hen Hu:
Numerically Convex Forms and Their Application in Gate Sizing.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(9): 1637-1647 (2007) |
| 2006 |
|---|
| 6 | EE | Sanghamitra Roy,
Charlie Chung-Ping Chen:
ConvexSmooth: A simultaneous convex fitting and smoothing algorithm for convex optimization problems.
ISQED 2006: 665-670 |
| 2005 |
|---|
| 5 | | Sanghamitra Roy,
Weijen Chen:
ConvexFit: an optimal minimum-error convex fitting and smoothing algorithm with application to gate-sizing.
ICCAD 2005: 196-203 |
| 4 | EE | Sanghamitra Roy,
Prith Banerjee:
An Algorithm for Trading Off Quantization Error with Hardware Resources for MATLAB-Based FPGA Design.
IEEE Trans. Computers 54(7): 886-896 (2005) |
| 2004 |
|---|
| 3 | EE | Sanghamitra Roy,
Prithviraj Banerjee:
An algorithm for converting floating-point computations to fixed-point in MATLAB based FPGA design.
DAC 2004: 484-487 |
| 2 | EE | Sanghamitra Roy,
Debjit Sinha,
Prithviraj Banerjee:
An algorithm for trading off quantization error with hardware resources for MATLAB based FPGA design.
FPGA 2004: 256 |
| 2003 |
|---|
| 1 | EE | Biswajit Sarkar,
Sanghamitra Roy,
Debranjan Sarkar:
Hierarchical representation of digitized curves through dominant point detection.
Pattern Recognition Letters 24(15): 2869-2882 (2003) |
