| 2009 |
|---|
| 104 | EE | David Bañeres,
Jordi Cortadella,
Michael Kishinevsky:
Timing-driven N-way decomposition.
ACM Great Lakes Symposium on VLSI 2009: 363-368 |
| 103 | EE | David Bañeres,
Jordi Cortadella,
Michael Kishinevsky:
A Recursive Paradigm to Solve Boolean Relations.
IEEE Trans. Computers 58(4): 512-527 (2009) |
| 2008 |
|---|
| 102 | EE | Michael Kishinevsky,
Jordi Cortadella:
Time elastic digital systems and Petri Nets.
ACSD 2008: 1-2 |
| 101 | EE | Josep Carmona,
Jordi Cortadella,
Michael Kishinevsky:
A Region-Based Algorithm for Discovering Petri Nets from Event Logs.
BPM 2008: 358-373 |
| 100 | EE | Timothy Kam,
Michael Kishinevsky,
Jordi Cortadella,
Marc Galceran Oms:
Correct-by-construction microarchitectural pipelining.
ICCAD 2008: 434-441 |
| 99 | EE | Dmitry Bufistov,
Jorge Júlvez,
Jordi Cortadella:
Performance optimization of elastic systems using buffer resizing and buffer insertion.
ICCAD 2008: 442-448 |
| 98 | EE | Josep Carmona,
Jordi Cortadella,
Michael Kishinevsky,
Alex Kondratyev,
Luciano Lavagno,
Alexandre Yakovlev:
A Symbolic Algorithm for the Synthesis of Bounded Petri Nets.
Petri Nets 2008: 92-111 |
| 97 | EE | Kyller Costa Gorgônio,
Jordi Cortadella:
Hardware Synthesis for Asynchronous Communications Mechanisms.
SCCC 2008: 135-143 |
| 96 | EE | Josep Carmona,
Jordi Cortadella:
Encoding Large Asynchronous Controllers With ILP Techniques.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(1): 20-33 (2008) |
| 95 | EE | Josep Carmona,
Jordi Cortadella,
Yousuke Takada,
Ferdinand Peper:
Formal methods for the analysis and synthesis of nanometer-scale cellular arrays.
JETC 4(2): (2008) |
| 94 | EE | Jordi Cortadella,
Michael Kishinevsky,
Dmitry Bufistov,
Josep Carmona,
Jorge Júlvez:
Elasticity and Petri Nets.
T. Petri Nets and Other Models of Concurrency 1: 221-249 (2008) |
| 2007 |
|---|
| 93 | EE | Jordi Cortadella,
Michael Kishinevsky:
Synchronous Elastic Circuits with Early Evaluation and Token Counterflow.
DAC 2007: 416-419 |
| 92 | EE | David Bañeres,
Jordi Cortadella,
Michael Kishinevsky:
Layout-aware gate duplication and buffer insertion.
DATE 2007: 1367-1372 |
| 91 | EE | Kyller Costa Gorgônio,
Jordi Cortadella,
Fei Xia:
A Compositional Method for the Synthesis of Asynchronous Communication Mechanisms.
ICATPN 2007: 144-163 |
| 90 | EE | Dmitry Bufistov,
Jordi Cortadella,
Michael Kishinevsky,
Sachin S. Sapatnekar:
A general model for performance optimization of sequential systems.
ICCAD 2007: 362-369 |
| 89 | EE | Alexander Taubin,
Jordi Cortadella,
Luciano Lavagno,
Luciano Lavagno,
Alex Kondratyev,
Ad M. G. Peeters:
Design Automation of Real-Life Asynchronous Devices and Systems.
Foundations and Trends in Electronic Design Automation 2(1): 1-133 (2007) |
| 88 | EE | Robert Clarisó,
Jordi Cortadella:
Verification of Concurrent Systems with Parametric Delays Using Octahedra.
Fundam. Inform. 78(1): 1-33 (2007) |
| 87 | EE | Kyller Costa Gorgônio,
Jordi Cortadella,
Fei Xia,
Alexandre Yakovlev:
Automating Synthesis of Asynchronous Communication Mechanisms.
Fundam. Inform. 78(1): 75-100 (2007) |
| 86 | EE | Robert Clarisó,
Jordi Cortadella:
The octahedron abstract domain.
Sci. Comput. Program. 64(1): 115-139 (2007) |
| 2006 |
|---|
| 85 | EE | David Bañeres,
Jordi Cortadella,
Michael Kishinevsky:
Dominator-based partitioning for delay optimization.
ACM Great Lakes Symposium on VLSI 2006: 67-72 |
| 84 | EE | Michael Kishinevsky,
Jordi Cortadella,
Bill Grundmann,
Sava Krstic,
John O'Leary:
Synchronous Elastic Circuits.
CSR 2006: 3-5 |
| 83 | EE | Jordi Cortadella,
Michael Kishinevsky,
Bill Grundmann:
Synthesis of synchronous elastic architectures.
DAC 2006: 657-662 |
| 82 | EE | Josep Carmona,
Jordi Cortadella:
State encoding of large asynchronous controllers.
DAC 2006: 939-944 |
| 81 | EE | Sava Krstic,
Jordi Cortadella,
Michael Kishinevsky,
John O'Leary:
Synchronous Elastic Networks.
FMCAD 2006: 19-30 |
| 80 | EE | Jorge Júlvez,
Jordi Cortadella,
Michael Kishinevsky:
Performance analysis of concurrent systems with early evaluation.
ICCAD 2006: 448-455 |
| 79 | EE | Josep Carmona,
Jordi Cortadella,
Yousuke Takada,
Ferdinand Peper:
From molecular interactions to gates: a systematic approach.
ICCAD 2006: 891-898 |
| 78 | EE | Jordi Cortadella,
Alex Kondratyev,
Luciano Lavagno,
Christos P. Sotiriou:
Desynchronization: Synthesis of Asynchronous Circuits From Synchronous Specifications.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 1904-1921 (2006) |
| 77 | EE | Josep Carmona,
José Manuel Colom,
Jordi Cortadella,
F. García-Vallés:
Synthesis of asynchronous controllers using integer linear programming.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1637-1651 (2006) |
| 2005 |
|---|
| 76 | EE | Robert Clarisó,
Jordi Cortadella:
Verification of Concurrent Systems with Parametric Delays Using Octahedra.
ACSD 2005: 122-131 |
| 75 | EE | Jordi Cortadella,
Kyller Costa Gorgônio,
Fei Xia,
Alexandre Yakovlev:
Automating Synthesis of Asynchronous Communication Mechanisms.
ACSD 2005: 166-175 |
| 74 | EE | Robert Clarisó,
Enric Rodríguez-Carbonell,
Jordi Cortadella:
Derivation of Non-structural Invariants of Petri Nets Using Abstract Interpretation.
ICATPN 2005: 188-207 |
| 73 | EE | Jordi Cortadella,
Alex Kondratyev,
Luciano Lavagno,
Claudio Passerone,
Yosinori Watanabe:
Quasi-static scheduling of independent tasks for reactive systems.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(10): 1492-1514 (2005) |
| 2004 |
|---|
| 72 | | Jordi Cortadella,
Wolfgang Reisig:
Applications and Theory of Petri Nets 2004, 25th International Conference, ICATPN 2004, Bologna, Italy, June 21-25, 2004, Proceedings
Springer 2004 |
| 71 | EE | Robert Clarisó,
Jordi Cortadella:
Verification of timed circuits with symbolic delays.
ASP-DAC 2004: 628-633 |
| 70 | EE | Ivan Blunno,
Jordi Cortadella,
Alex Kondratyev,
Luciano Lavagno,
Kelvin Lwin,
Christos P. Sotiriou:
Handshake Protocols for De-Synchronization.
ASYNC 2004: 149-158 |
| 69 | EE | David Bañeres,
Jordi Cortadella,
Michael Kishinevsky:
A recursive paradigm to solve Boolean relations.
DAC 2004: 416-421 |
| 68 | EE | Jordi Cortadella,
Alex Kondratyev,
Luciano Lavagno,
Kelvin Lwin,
Christos P. Sotiriou:
From Synchronous to Asynchronous: An Automatic Approach.
DATE 2004: 1368-1369 |
| 67 | EE | Jordi Cortadella,
Alex Kondratyev,
Luciano Lavagno,
Christos P. Sotiriou:
Coping with The Variability of Combinational Logic Delays.
ICCD 2004: 505-508 |
| 66 | EE | Robert Clarisó,
Jordi Cortadella:
The Octahedron Abstract Domain.
SAS 2004: 312-327 |
| 65 | EE | Peter A. Beerel,
Jordi Cortadella,
Alex Kondratyev:
Bridging the Gap between Asynchronous Design and Designers.
VLSI Design 2004: 18-20 |
| 64 | EE | Nilesh Modi,
Jordi Cortadella:
Boolean Decomposition Using Two-literal Divisors.
VLSI Design 2004: 765-768 |
| 63 | EE | Jordi Cortadella,
Alex Kondratyev,
Luciano Lavagno,
Alexander Taubin,
Yosinori Watanabe:
Quasi-static Scheduling for Concurrent Architectures.
Fundam. Inform. 62(2): 171-196 (2004) |
| 2003 |
|---|
| 62 | EE | Jordi Cortadella,
Alex Kondratyev,
Luciano Lavagno,
Yosinori Watanabe:
Quasi-Static Scheduling for Concurrent Architectures.
ACSD 2003: 29-40 |
| 61 | EE | Josep Carmona,
Jordi Cortadella:
ILP Models for the Synthesis of Asynchronous Control Circuits.
ICCAD 2003: 818-826 |
| 60 | EE | Josep Carmona,
Jordi Cortadella,
Victor Khomenko,
Alexandre Yakovlev:
Synthesis of Asynchronous Hardware from Petri Nets.
Lectures on Concurrency and Petri Nets 2003: 345-401 |
| 59 | EE | Jordi Cortadella:
Timing-driven logic bi-decomposition.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(6): 675-685 (2003) |
| 2002 |
|---|
| 58 | | Jordi Cortadella,
Alexandre Yakovlev,
Grzegorz Rozenberg:
Concurrency and Hardware Design, Advances in Petri Nets
Springer 2002 |
| 57 | EE | Josep Carmona,
Jordi Cortadella,
Enric Pastor:
Synthesis of Reactive Systems: Application to Asynchronous Circuit Design.
Concurrency and Hardware Design 2002: 108-151 |
| 56 | EE | Marco A. Peña,
Jordi Cortadella,
Alexander B. Smirnov,
Enric Pastor:
A Case Study for the Verification of Complex Timed Circuits: IPCMOS.
DATE 2002: 44-53 |
| 55 | EE | Josep Carmona,
Jordi Cortadella:
Input/Output Compatibility of Reactive Systems.
FMCAD 2002: 360-377 |
| 54 | EE | Jordi Cortadella,
Alex Kondratyev,
Luciano Lavagno,
Claudio Passerone,
Yosinori Watanabe:
Quasi-Static Scheduling of Independent Tasksfor Reactive Systems.
ICATPN 2002: 80-100 |
| 53 | | Jordi Cortadella:
Bi-Decomposition and Tree-Height Reduction for Timing Optimization.
IWLS 2002: 233-238 |
| 52 | EE | Jordi Cortadella,
Alexandre Yakovlev,
Jim D. Garside:
Logic Design of Asynchronous Circuits (Tutorial Abstract).
VLSI Design 2002: 26- |
| 51 | | Josep Carmona,
Jordi Cortadella,
Enric Pastor:
A structural encoding technique for the synthesis of asynchronous circuits.
Fundam. Inform. 50(2): 135-154 (2002) |
| 50 | EE | Jordi Cortadella,
Michael Kishinevsky,
Steven M. Burns,
Alex Kondratyev,
Luciano Lavagno,
Ken S. Stevens,
Alexander Taubin,
Alexandre Yakovlev:
Lazy transition systems and asynchronous circuit synthesis withrelative timing assumptions.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(2): 109-130 (2002) |
| 2001 |
|---|
| 49 | EE | Josep Carmona,
Jordi Cortadella,
Enric Pastor:
A structural encoding technique for the synthesis of asynchronous circuits.
ACSD 2001: 157-166 |
| 48 | EE | Gianluca Cornetta,
Jordi Cortadella:
A Multi-Radix Approach to Asynchronous Division.
ASYNC 2001: 25- |
| 47 | EE | Enric Pastor,
Jordi Cortadella,
Oriol Roig:
Symbolic Analysis of Bounded Petri Nets.
IEEE Trans. Computers 50(5): 432-448 (2001) |
| 2000 |
|---|
| 46 | EE | Marco A. Peña,
Jordi Cortadella,
Enric Pastor,
Alex Kondratyev:
Formal Verification of Safety Properties in Timed Circuits.
ASYNC 2000: 2-11 |
| 45 | EE | Jordi Cortadella,
Alex Kondratyev,
Luciano Lavagno,
Marc Massot,
Sandra Moral,
Claudio Passerone,
Yosinori Watanabe,
Alberto L. Sangiovanni-Vincentelli:
Task generation and compile-time scheduling for mixed data-control embedded software.
DAC 2000: 489-494 |
| 44 | EE | Jordi Cortadella,
Michael Kishinevsky,
Alex Kondratyev,
Luciano Lavagno,
Alexandre Yakovlev:
Hardware and Petri Nets: Application to Asynchronous Circuit Design.
ICATPN 2000: 1-15 |
| 43 | | Jordi Cortadella,
Gabriel Valiente:
A Relational View of Subgraph Isomorphism.
RelMiCS 2000: 45-54 |
| 1999 |
|---|
| 42 | EE | Alexander Taubin,
Alex Kondratyev,
Jordi Cortadella,
Luciano Lavagno:
Behavioral Transformations to Increase Noise Immunity in Asynchronous Specifications.
ASYNC 1999: 36- |
| 41 | EE | Alex Kondratyev,
Jordi Cortadella,
Michael Kishinevsky,
Luciano Lavagno,
Alexandre Yakovlev:
Automatic Synthesis and Optimization of Partially Specified Asynchronous Systems.
DAC 1999: 110-115 |
| 40 | EE | Ken S. Stevens,
Shai Rotem,
Steven M. Burns,
Jordi Cortadella,
Ran Ginosar,
Michael Kishinevsky,
Marly Roncken:
CAD Directions for High Performance Asynchronous Circuits.
DAC 1999: 116-121 |
| 39 | EE | Gianluca Cornetta,
Jordi Cortadella:
A Radix-16 SRT Division Unit with Speculation of the Quotient Digits.
Great Lakes Symposium on VLSI 1999: 74-77 |
| 38 | EE | Enric Pastor,
Jordi Cortadella,
Marco A. Peña:
Structural Methods to Improve the Symbolic Analysis of Petri Nets.
ICATPN 1999: 26-45 |
| 37 | EE | Hiroshi Saito,
Alex Kondratyev,
Jordi Cortadella,
Luciano Lavagno,
Alexandre Yakovlev:
What is the cost of delay insensitivity?
ICCAD 1999: 316-323 |
| 36 | EE | Jordi Cortadella,
Michael Kishinevsky,
Steven M. Burns,
Ken S. Stevens:
Synthesis of asynchronous control circuits with automatically generated relative timing assumptions.
ICCAD 1999: 324-331 |
| 35 | EE | Jordi Cortadella,
Michael Kishinevsky,
Alex Kondratyev,
Luciano Lavagno,
Enric Pastor,
Alexandre Yakovlev:
Decomposition and technology mapping of speed-independent circuits using Boolean relations.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(9): 1221-1236 (1999) |
| 1998 |
|---|
| 34 | EE | Alex Kondratyev,
Jordi Cortadella,
Michael Kishinevsky,
Luciano Lavagno,
Alexander Taubin,
Alexandre Yakovlev:
Identifying State Coding Conflicts in Asynchronous System Specifications Using Petri Net Unfoldings.
ACSD 1998: 152- |
| 33 | EE | Jordi Cortadella:
Combining Structural and Symbolic Methods for the Verification of Concurrent Systems.
ACSD 1998: 2-7 |
| 32 | EE | Michael Kishinevsky,
Jordi Cortadella,
Alex Kondratyev:
Asynchronous Interface Specification, Analysis and Synthesis.
DAC 1998: 2-7 |
| 31 | EE | Enric Pastor,
Jordi Cortadella:
Efficient Encoding Schemes for Symbolic Analysis of Petri Nets.
DATE 1998: 790-795 |
| 30 | EE | Jordi Cortadella,
Michael Kishinevsky,
Alex Kondratyev,
Luciano Lavagno,
Alexander Taubin,
Alexandre Yakovlev:
Lazy transition systems: application to timing optimization of asynchronous circuits.
ICCAD 1998: 324-331 |
| 29 | | Jordi Cortadella,
Michael Kishinevsky,
Luciano Lavagno,
Alexandre Yakovlev:
Deriving Petri Nets for Finite Transition Systems.
IEEE Trans. Computers 47(8): 859-882 (1998) |
| 28 | EE | Enric Musoll,
Tomás Lang,
Jordi Cortadella:
Working-zone encoding for reducing the energy in microprocessor address buses.
IEEE Trans. VLSI Syst. 6(4): 568-572 (1998) |
| 27 | EE | Enric Pastor,
Jordi Cortadella,
Alex Kondratyev,
Oriol Roig:
Structural methods for the synthesis of speed-independent circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(11): 1108-1129 (1998) |
| 26 | EE | Fermín Sánchez,
Jordi Cortadella:
Reducing Register Pressure in Software Pipelining.
J. Inf. Sci. Eng. 14(1): 265-279 (1998) |
| 25 | EE | Alex Kondratyev,
Michael Kishinevsky,
Alexander Taubin,
Jordi Cortadella,
Luciano Lavagno:
The Use of Petri Nets for the Design and Verification of Asynchronous Circuits and Systems.
Journal of Circuits, Systems, and Computers 8(1): 67-118 (1998) |
| 1997 |
|---|
| 24 | EE | Alex Kondratyev,
Michael Kishinevsky,
Jordi Cortadella,
Luciano Lavagno,
Alexandre Yakovlev:
Technology Mapping for Speed-Independent Circuits: Decomposition and Resynthesis.
ASYNC 1997: 240-253 |
| 23 | EE | Alexei L. Semenov,
Alexandre Yakovlev,
Enric Pastor,
Marco A. Peña,
Jordi Cortadella,
Luciano Lavagno:
Partial order based approach to synthesis of speed-independent circuits.
ASYNC 1997: 254- |
| 22 | EE | Alexei L. Semenov,
Alexandre Yakovlev,
Enric Pastor,
Marco A. Peña,
Jordi Cortadella:
Synthesis of Speed-Independent Circuits from STG-Unfolding Segment.
DAC 1997: 16-21 |
| 21 | EE | Oriol Roig,
Jordi Cortadella,
Marco A. Peña,
Enric Pastor:
Automatic Generation of Synchronous Test Patterns for Asynchronous Circuits.
DAC 1997: 620-625 |
| 20 | EE | Jordi Cortadella,
Michael Kishinevsky,
Alex Kondratyev,
Luciano Lavagno,
Alexandre Yakovlev:
Technology mapping of speed-independent circuits based on combinational decomposition and resynthesis.
ED&TC 1997: 98-105 |
| 19 | | Michael Kishinevsky,
Jordi Cortadella,
Alex Kondratyev,
Luciano Lavagno,
Alexander Taubin,
Alexandre Yakovlev:
Coupling Asynchrony and Interrupts: Place Chart Nets.
ICATPN 1997: 328-347 |
| 18 | EE | Jordi Cortadella,
Michael Kishinevsky,
Alex Kondratyev,
Luciano Lavagno,
Enric Pastor,
Alexandre Yakovlev:
Decomposition and technology mapping of speed-independent circuits using Boolean relations.
ICCAD 1997: 220-227 |
| 17 | EE | Enric Musoll,
Tomás Lang,
Jordi Cortadella:
Exploiting the locality of memory references to reduce the address bus energy.
ISLPED 1997: 202-207 |
| 16 | EE | Jordi Cortadella,
Michael Kishinevsky,
Alex Kondratyev,
Luciano Lavagno,
Alexandre Yakovlev:
A region-based theory for state assignment in speed-independent circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(8): 793-812 (1997) |
| 1996 |
|---|
| 15 | EE | Jordi Cortadella,
Michael Kishinevsky,
Alex Kondratyev,
Luciano Lavagno,
Alexandre Yakovlev:
Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis.
DAC 1996: 63-66 |
| 14 | | Fermín Sánchez,
Jordi Cortadella:
RESIS: A New Methodology for Register Optimization in Software Pipelining.
Euro-Par, Vol. II 1996: 824-832 |
| 1995 |
|---|
| 13 | EE | Oriol Roig,
Jordi Cortadella,
Enric Pastor:
Hierarchical gate-level verification of speed-independent circuits.
ASYNC 1995: 128-137 |
| 12 | | Oriol Roig,
Jordi Cortadella,
Enric Pastor:
Verification of Asynchronous Circuits by BDD-based Model Checking of Petri Nets.
Application and Theory of Petri Nets 1995: 374-391 |
| 11 | EE | Enric Pastor,
Jordi Cortadella,
Oriol Roig:
A new look at the conditions for the synthesis of speed-independent circuits.
Great Lakes Symposium on VLSI 1995: 230- |
| 10 | EE | Jordi Cortadella,
Michael Kishinevsky,
Luciano Lavagno,
Alexandre Yakovlev:
Synthesizing Petri nets from state-based models.
ICCAD 1995: 164-171 |
| 9 | EE | Enric Musoll,
Jordi Cortadella:
High-level synthesis techniques for reducing the activity of functional units.
ISLPD 1995: 99-104 |
| 8 | EE | Enric Musoll,
Jordi Cortadella:
Scheduling and resource binding for low power.
ISSS 1995: 104-109 |
| 1994 |
|---|
| 7 | | Enric Pastor,
Oriol Roig,
Jordi Cortadella,
Rosa M. Badia:
Petri Net Analysis Using Boolean Manipulation.
Application and Theory of Petri Nets 1994: 416-435 |
| 6 | | Jordi Cortadella,
José A. B. Fortes,
Edward A. Lee:
Design and Prototyping of Digital Signal Processing (DSP) Systems: Introduction.
HICSS (1) 1994: 56-57 |
| 5 | | Jordi Cortadella,
Tomás Lang:
High-Radix Division and Square-Root with Speculation.
IEEE Trans. Computers 43(8): 919-931 (1994) |
| 1993 |
|---|
| 4 | EE | Enric Pastor,
Jordi Cortadella:
Polynomial algorithms for the synthesis for hazard-free circuits from signal transition graphs.
ICCAD 1993: 250-254 |
| 3 | | Enric Pastor,
Jordi Cortadella:
An Efficient Unique State Coding Algorithm for Signal Transition Graphs.
ICCD 1993: 174-177 |
| 2 | EE | Jordi Cortadella,
Tomás Lang:
Division with speculation of quotient digits.
IEEE Symposium on Computer Arithmetic 1993: 87-94 |
| 1992 |
|---|
| 1 | | Jordi Cortadella,
José M. Llabería:
Evaluation of A + B = K Conditions Without Carry Propagation.
IEEE Trans. Computers 41(11): 1484-1488 (1992) |
