Soo-Ik Chae

2007
27	EE	Kai Huang, Sang-Il Han, Katalin Popovici, Lisane B. de Brisolara, Xavier Guerin, Lei Li, Xiaolang Yan, Soo-Ik Chae, Luigi Carro, Ahmed Amine Jerraya: Simulink-Based MPSoC Design Flow: Case Study of Motion-JPEG and H.264. DAC 2007: 39-42
26	EE	Lisane B. de Brisolara, Sang-Il Han, Xavier Guerin, Luigi Carro, Ricardo Reis, Soo-Ik Chae, Ahmed Amine Jerraya: Reducing fine-grain communication overhead in multithread code generation for heterogeneous MPSoC. SCOPES 2007: 81-89
2006
25	EE	Sanggyu Park, Sang-yong Yoon, Soo-Ik Chae: Reusable component IP design using refinement-based design environment. ASP-DAC 2006: 588-593
24	EE	Sang-Il Han, Soo-Ik Chae, Ahmed Amine Jerraya: Functional modeling techniques for efficient SW code generation of video codec applications. ASP-DAC 2006: 935-940
23	EE	Ren Huang, Soo-Ik Chae: Implementation of an OpenVG Rasterizer with Configurable Anti-Aliasing and Multi-Window Scissoring. CIT 2006: 179
22	EE	Sang-Il Han, Xavier Guerin, Soo-Ik Chae, Ahmed Amine Jerraya: Buffer memory optimization for video codec application modeled in Simulink. DAC 2006: 689-694
21	EE	Sanggyu Park, Sang-yong Yoon, Soo-Ik Chae: A Mixed-Level Virtual Prototyping Environment for Refinement-Based Design Environment. IEEE International Workshop on Rapid System Prototyping 2006: 63-68
20	EE	Seokkee Kim, Soo-Ik Chae: A Bootstrapped Switch for nMOS Reversible Energy Recovery Logic for Low-Voltage Applications. IEICE Transactions 89-C(5): 649-652 (2006)
2005
19	EE	Minho Kim, Ingu Hwang, Soo-Ik Chae: A fast VLSI architecture for full-search variable block size motion estimation in MPEG-4 AVC/H.264. ASP-DAC 2005: 631-634
18	EE	Seokkee Kim, Soo-Ik Chae: Implementation of a simple 8-bit microprocessor with reversible energy recovery logic. Conf. Computing Frontiers 2005: 421-426
17	EE	Sanggyu Park, Soo-Ik Chae: A C/C++-Based Functional Verification Framework Using the SystemC Verification Library. IEEE International Workshop on Rapid System Prototyping 2005: 237-239
16	EE	Seokkee Kim, Soo-Ik Chae: Complexity reduction in an nRERL microprocessor. ISLPED 2005: 180-185
15	EE	Sanggyu Park, Soo-Ik Chae: A Two-Week Program for a Platform-Based SoC Design. MSE 2005: 43-44
2004
14	EE	Sang-Il Han, Amer Baghdadi, Marius Bonaciu, Soo-Ik Chae, Ahmed Amine Jerraya: An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory. DAC 2004: 250-255
13	EE	Eunseok Song, Young-Kil Park, Soon Kwon, Soo-Ik Chae: A Cycle-Accurate Energy Estimator for CMOS Digital Circuits. PATMOS 2004: 159-168
2001
12	EE	Seokkee Kim, Jun-Ho Kwon, Soo-Ik Chae: An 8-b nRERL microprocessor for ultra-low-energy applications. ASP-DAC 2001: 27-28
11	EE	Youngsoo Shin, Soo-Ik Chae, Kiyoung Choi: Partial bus-invert coding for power optimization of application-specific systems. IEEE Trans. VLSI Syst. 9(2): 377-383 (2001)
2000
10	EE	Joonho Lim, Dong-G. Kim, Sang-C. Kang, Soo-Ik Chae: An 8×8 nRERL serial multiplier for ultra-low-power aplications. ASP-DAC 2000: 35-36
9	EE	Kyung-soo Oh, Sang-yong Yoon, Soo-Ik Chae: Emulator Environment Based on an FPGA Prototyping Board. IEEE International Workshop on Rapid System Prototyping 2000: 72-77
8	EE	Jun-Ho Kwon, Joonho Lim, Soo-Ik Chae: A three-port nRERL register file for ultra-low-energy applications. ISLPED 2000: 161-166
7	EE	Koichi Nose, Soo-Ik Chae, Takayasu Sakurai: Voltage dependent gate capacitance and its impact in estimating power and delay of CMOS digital circuits with low supply voltage (poster session). ISLPED 2000: 228-230
1998
6	EE	Youngsoo Shin, Soo-Ik Chae, Kiyoung Choi: Partial bus-invert coding for power optimization of system level bus. ISLPED 1998: 127-129
5	EE	Eel-Wan Lee, Soo-Ik Chae: Fast Design of Reduced-Complexity Nearest-Neighbor Classifiers Using Triangular Inequality. IEEE Trans. Pattern Anal. Mach. Intell. 20(5): 562-566 (1998)
1994
4		Sungjun Park, Seung-Jai Min, Soo-Ik Chae: Stereo Correspondence with Discrete-Time Cellular Neural Networks. ISCAS 1994: 225-228
3		Joonho Lim, Eel-Wan Lee, Soo-Ik Chae: Character Recognition by Neural Networks with Single-Layer Training and Rejection Mechanism. ISCAS 1994: 327-330
2		Seung-Jai Min, Eel-Wan Lee, Soo-Ik Chae: A Study on the Stochastic Computation Using the Ratio of One Pulses and Zero Pulses. ISCAS 1994: 471-474
1993
1		Eel-Wan Lee, Jae-Hee Won, Soo-Ik Chae: Modified Probabilistic RAM Archticture for VLSI Implementation of a Backpropagation Learning Algorithm. ISCAS 1993: 1897-1900

Coauthor Index

1	Amer Baghdadi	[14]
2	Marius Bonaciu	[14]
3	Lisane B. de Brisolara	[26] [27]
4	Luigi Carro	[26] [27]
5	Kiyoung Choi	[6] [11]
6	Xavier Guerin	[22] [26] [27]
7	Sang-Il Han	[14] [22] [24] [26] [27]
8	Kai Huang	[27]
9	Ren Huang	[23]
10	Ingu Hwang	[19]
11	Ahmed Amine Jerraya	[14] [22] [24] [26] [27]
12	Sang-C. Kang	[10]
13	Dong-G. Kim	[10]
14	Minho Kim	[19]
15	Seokkee Kim	[12] [16] [18] [20]
16	Jun-Ho Kwon	[8] [12]
17	Soon Kwon	[13]
18	Eel-Wan Lee	[1] [2] [3] [5]
19	Lei Li	[27]
20	Joonho Lim	[3] [8] [10]
21	Seung-Jai Min	[2] [4]
22	Koichi Nose	[7]
23	Kyung-soo Oh	[9]
24	Sanggyu Park	[15] [17] [21] [25]
25	Sungjun Park	[4]
26	Young-Kil Park	[13]
27	Katalin Popovici	[27]
28	Ricardo Augusto da Luz Reis (Ricardo A. L. Reis, Ricardo Reis)	[26]
29	Takayasu Sakurai	[7]
30	Youngsoo Shin	[6] [11]
31	Eunseok Song	[13]
32	Jae-Hee Won	[1]
33	Xiaolang Yan	[27]
34	Sang-yong Yoon	[9] [21] [25]

Colors in the list of coauthors