| 2008 |
|---|
| 12 | EE | Lihong Zhang,
Nuttorn Jangkrajarng,
Sambuddha Bhattacharya,
C.-J. Richard Shi:
Parasitic-Aware Optimization and Retargeting of Analog Layouts: A Symbolic-Template Approach.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(5): 791-802 (2008) |
| 2007 |
|---|
| 11 | EE | Lili Zhou,
Cherry Wakayama,
Robin Panda,
Nuttorn Jangkrajarng,
Bo Hu,
C.-J. Richard Shi:
Implementing a 2-Gbs 1024-bit 1/2-rate low-density parity-check code decoder in three-dimensional integrated circuits.
ICCD 2007: 194-201 |
| 2006 |
|---|
| 10 | EE | Lili Zhou,
Cherry Wakayama,
Nuttorn Jangkrajarng,
Bo Hu,
C.-J. Richard Shi:
A high-throughput low-power fully parallel 1024-bit 1/2-rate low density parity check code decoder in 3-dimensional integrated circuits.
ASP-DAC 2006: 92-93 |
| 9 | EE | Nuttorn Jangkrajarng,
Lihong Zhang,
Sambuddha Bhattacharya,
Nathan Kohagen,
C.-J. Richard Shi:
Template-based parasitic-aware optimization and retargeting of analog and RF integrated circuit layouts.
ICCAD 2006: 342-348 |
| 8 | EE | Sambuddha Bhattacharya,
Nuttorn Jangkrajarng,
C.-J. Richard Shi:
Multilevel symmetry-constraint generation for retargeting large analog layouts.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(6): 945-960 (2006) |
| 2005 |
|---|
| 7 | EE | Sambuddha Bhattacharya,
Nuttorn Jangkrajarng,
C.-J. Richard Shi:
Template-driven parasitic-aware optimization of analog integrated circuit layouts.
DAC 2005: 644-647 |
| 6 | EE | Roy Hartono,
Nuttorn Jangkrajarng,
Sambuddha Bhattacharya,
C.-J. Richard Shi:
Automatic Device Layout Generation for Analog Layout Retargeting.
VLSI Design 2005: 457-462 |
| 2004 |
|---|
| 5 | EE | Nuttorn Jangkrajarng,
Sambuddha Bhattacharya,
Roy Hartono,
C.-J. Richard Shi:
Multiple specifications radio-frequency integrated circuit design with automatic template-driven layout retargeting.
ASP-DAC 2004: 394-399 |
| 4 | EE | Sambuddha Bhattacharya,
Nuttorn Jangkrajarng,
Roy Hartono,
C.-J. Richard Shi:
Hierarchical extraction and verification of symmetry constraints for analog layout automation.
ASP-DAC 2004: 400-405 |
| 3 | EE | Sambuddha Bhattacharya,
Nuttorn Jangkrajarng,
Roy Hartono,
C.-J. Richard Shi:
Correct-by-construction layout-centric retargeting of large analog designs.
DAC 2004: 139-144 |
| 2003 |
|---|
| 2 | EE | Nuttorn Jangkrajarng,
Sambuddha Bhattacharya,
Roy Hartono,
C.-J. Richard Shi:
Automatic analog layout retargeting for new processes and device sizes.
ISCAS (4) 2003: 704-707 |
| 1 | EE | Nuttorn Jangkrajarng,
Sambuddha Bhattacharya,
Roy Hartono,
C.-J. Richard Shi:
IPRAIL - intellectual property reuse-based analog IC layout automation.
Integration 36(4): 237-262 (2003) |
