2006 |
19 | EE | Hongmei Li,
Cole E. Zemke,
Giorgos Manetas,
Vladimir I. Okhmatovski,
Elyse Rosenbaum,
Andreas C. Cangellaris:
An automated and efficient substrate noise analysis tool.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(3): 454-468 (2006) |
2005 |
18 | EE | Elyse Rosenbaum,
Sami Hyvonen:
On-chip ESD protection for RF I/Os: devices, circuits and models.
ISCAS (2) 2005: 1202-1205 |
17 | EE | Sami Hyvonen,
Sopan Joshi,
Elyse Rosenbaum:
Comprehensive ESD protection for RF inputs.
Microelectronics Reliability 45(2): 245-254 (2005) |
2004 |
16 | EE | Rouwaida Kanj,
Timothy Lehner,
Bhavna Agrawal,
Elyse Rosenbaum:
Noise characterization of static CMOS gates.
DAC 2004: 888-893 |
15 | EE | Rouwaida Kanj,
Elyse Rosenbaum:
Critical evaluation of SOI design guidelines.
IEEE Trans. VLSI Syst. 12(9): 885-894 (2004) |
2003 |
14 | EE | Sopan Joshi,
Elyse Rosenbaum:
Simulator-independent compact modeling of vertical npn transistors for ESD and RF circuit simulation.
Microelectronics Reliability 43(7): 1021-1027 (2003) |
2002 |
13 | EE | Hongmei Li,
Jorge Carballido,
Harry H. Yu,
Vladimir I. Okhmatovski,
Elyse Rosenbaum,
Andreas C. Cangellaris:
Comprehensive frequency-dependent substrate noise analysis using boundary element methods.
ICCAD 2002: 2-9 |
12 | EE | Rouwaida Kanj,
Elyse Rosenbaum:
A critical look at design guidelines for SOI logic gates.
ISCAS (3) 2002: 261-264 |
2001 |
11 | EE | Jie Wu,
Patrick Juliano,
Elyse Rosenbaum:
Breakdown and latent damage of ultra-thin gate oxides under ESD stress conditions.
Microelectronics Reliability 41(11): 1771-1779 (2001) |
10 | EE | Yu Wang,
Patrick Juliano,
Sopan Joshi,
Elyse Rosenbaum:
Electrothermal model for simulation of bulk-Si and SOI diodes in ESD protection circuits.
Microelectronics Reliability 41(11): 1781-1787 (2001) |
9 | EE | Elyse Rosenbaum,
Jie Wu:
Trap generation and breakdown processes in very thin gate oxides.
Microelectronics Reliability 41(5): 625-632 (2001) |
2000 |
8 | EE | Danqing Chen,
Erhong Li,
Elyse Rosenbaum,
Sung-Mo Kang:
Interconnect thermal modeling for accurate simulation of circuittiming and reliability.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(2): 197-205 (2000) |
1999 |
7 | EE | Tong Li,
Ching-Han Tsai,
Elyse Rosenbaum,
Sung-Mo Kang:
Substrate Modeling and Lumped Substrate Resistance Extraction for CMOS ESD/Latchup Circuit Simulation.
DAC 1999: 549-554 |
6 | EE | Danqing Chen,
Erhong Li,
Elyse Rosenbaum,
Sung-Mo Kang:
Interconnect thermal modeling for determining design limits on current density.
ISPD 1999: 172-178 |
1998 |
5 | EE | Yi-Kan Cheng,
Prasun Raha,
Chin-Chi Teng,
Elyse Rosenbaum,
Sung-Mo Kang:
ILLIADS-T: an electrothermal timing simulator for temperature-sensitive reliability diagnosis of CMOS VLSI chips.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(8): 668-681 (1998) |
1997 |
4 | EE | Chin-Chi Teng,
Yi-Kan Cheng,
Elyse Rosenbaum,
Sung-Mo Kang:
iTEM: a temperature-dependent electromigration reliability diagnosis tool.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(8): 882-893 (1997) |
1996 |
3 | EE | Yi-Kan Cheng,
Chin-Chi Teng,
Abhijit Dharchoudhury,
Elyse Rosenbaum,
Sung-Mo Kang:
iCET: A Complete Chip-Level Thermal Reliability Diagnosis Tool for CMOS VLSI Chips.
DAC 1996: 548-551 |
2 | EE | Chin-Chi Teng,
Yi-Kan Cheng,
Elyse Rosenbaum,
Sung-Mo Kang:
Hierarchical Electromigration Reliability Diagnosis for VLSI Interconnects.
DAC 1996: 752-757 |
1993 |
1 | EE | Robert H. Tu,
Elyse Rosenbaum,
Wilson Y. Chan,
Chester C. Li,
Eric Minami,
Khandker Quader,
Ping K. Ko,
Chenming Hu:
Berkeley reliability tools-BERT.
IEEE Trans. on CAD of Integrated Circuits and Systems 12(10): 1524-1534 (1993) |