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Abhishek Ranjan

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2009
16EEMike Wu, Abhishek Ranjan, Khai N. Truong: An exploration of social requirements for exercise group formation. CHI 2009: 79-82
2008
15EEAbhishek Ranjan, Jeremy P. Birnholtz, Ravin Balakrishnan: Improving meeting capture by applying television production principles with audio and motion detection. CHI 2008: 227-236
2007
14EEAbhishek Ranjan, Jeremy P. Birnholtz, Ravin Balakrishnan: Dynamic shared visual spaces: experimenting with automatic camera control in a remote repair task. CHI 2007: 1177-1186
2006
13EEAbhishek Ranjan, Ravin Balakrishnan, Mark H. Chignell: Searching in audio: the utility of transcripts, dichotic presentation, and time-compression. CHI 2006: 721-730
12EEAbhishek Ranjan, Jeremy P. Birnholtz, Ravin Balakrishnan: An exploratory analysis of partner action and camera control in a video-mediated collaborative task. CSCW 2006: 403-412
11EEAmlan Ghosh, Abhishek Ranjan, Nirmal B. Chakrabarti: Design and Implementation of Analog Multitone Signal Generator Using Regenerative Frequency Divider for OFDM Transceiver. DELTA 2006: 23-30
2005
10EEShahzad Malik, Abhishek Ranjan, Ravin Balakrishnan: Interacting with large displays from a distance with vision-tracked multi-finger gestural input. UIST 2005: 43-52
2004
9EESteve Tsang, Ravin Balakrishnan, Karan Singh, Abhishek Ranjan: A suggestive interface for image guided 3D sketching. CHI 2004: 591-598
8EENavaratnasothie Selvakkumaran, Abhishek Ranjan, Salil Raje, George Karypis: Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources. DAC 2004: 741-746
7EENavaratnasothie Selvakkumaran, Abhishek Ranjan, Salil Raje, George Karypis: Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources. FPGA 2004: 253
6EETaraneh Taghavi, Soheil Ghiasi, Abhishek Ranjan, Salil Raje, Majid Sarrafzadeh: Innovate or perish: FPGA physical design. ISPD 2004: 148-155
2003
5EEMaogang Wang, Abhishek Ranjan, Salil Raje: Multi-Million Gate FPGA Physical Design Challenges. ICCAD 2003: 891-899
2001
4EEAbhishek Ranjan, Ankur Srivastava, V. Karnam, Majid Sarrafzadeh: Layout aware retiming. ACM Great Lakes Symposium on VLSI 2001: 25-30
3EEAbhishek Ranjan, Kia Bazargan, S. Ogrenci, Majid Sarrafzadeh: Fast floorplanning for effective prediction and construction. IEEE Trans. VLSI Syst. 9(2): 341-351 (2001)
2000
2EEKia Bazargan, Abhishek Ranjan, Majid Sarrafzadeh: Fast and accurate estimation of floorplans in logic/high-level synthesis. ACM Great Lakes Symposium on VLSI 2000: 95-100
1EEAbhishek Ranjan, Kia Bazargan, Majid Sarrafzadeh: Fast Hierarchical Floorplanning with Congestion and Timing Control. ICCD 2000: 357-362

Coauthor Index

1Ravin Balakrishnan [9] [10] [12] [13] [14] [15]
2Kia Bazargan [1] [2] [3]
3Jeremy P. Birnholtz [12] [14] [15]
4Nirmal B. Chakrabarti [11]
5Mark H. Chignell [13]
6Soheil Ghiasi [6]
7Amlan Ghosh [11]
8V. Karnam [4]
9George Karypis [7] [8]
10Shahzad Malik [10]
11S. Ogrenci [3]
12Salil Raje [5] [6] [7] [8]
13Majid Sarrafzadeh [1] [2] [3] [4] [6]
14Navaratnasothie Selvakkumaran [7] [8]
15Karan Singh [9]
16Ankur Srivastava [4]
17Taraneh Taghavi [6]
18Khai N. Truong [16]
19Steve Tsang [9]
20Maogang Wang [5]
21Mike Wu [16]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)