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Mircea R. Stan

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2009
67EEAdam C. Cabe, Zhenyu Qi, Stuart N. Wooters, Travis N. Blalock, Mircea R. Stan: Small embeddable NBTI sensors (SENS) for tracking on-chip performance decay. ISQED 2009: 1-6
66EES. Sankar, Yan Zhang, Sudhanva Gurumurthi, Mircea R. Stan: Sensitivity-Based Optimization of Disk Architecture. IEEE Trans. Computers 58(1): 69-81 (2009)
2008
65EEZhenyu Qi, Mircea R. Stan: NBTI resilient circuits using adaptive body biasing. ACM Great Lakes Symposium on VLSI 2008: 285-290
64EEWei Huang, Mircea R. Stan, Karthik Sankaranarayanan, Robert J. Ribando, Kevin Skadron: Many-core design from a thermal perspective. DAC 2008: 746-749
63EESriram Sankar, Sudhanva Gurumurthi, Mircea R. Stan: Intra-disk Parallelism: An Idea Whose Time Has Come. ISCA 2008: 303-314
62 Sriram Sankar, Sudhanva Gurumurthi, Mircea R. Stan: Sensitivity Based Power Management of Enterprise Storage Systems. MASCOTS 2008: 93-102
61EEWei Huang, Karthik Sankaranarayanan, Kevin Skadron, Robert J. Ribando, Mircea R. Stan: Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model. IEEE Trans. Computers 57(9): 1277-1288 (2008)
2007
60EEMatthew M. Ziegler, Gary S. Ditlow, Stephen V. Kosonocky, Zhenyu Qi, Mircea R. Stan: Structured and tuned array generation (STAG) for high-performance random logic. ACM Great Lakes Symposium on VLSI 2007: 257-262
59EEYan Zhang, Mircea R. Stan: Temperature-aware circuit design using adaptive body biasing. ACM Great Lakes Symposium on VLSI 2007: 84-89
58EEYan Zhang, Sudhanva Gurumurthi, Mircea R. Stan: SODA: Sensitivity Based Optimization of Disk Architecture. DAC 2007: 865-870
57EEZhenyu Qi, Matthew M. Ziegler, Stephen V. Kosonocky, Jan M. Rabaey, Mircea R. Stan: Multi-Dimensional Circuit and Micro-Architecture Level Optimization. ISQED 2007: 275-280
56EEZhijian Lu, Wei Huang, Mircea R. Stan, Kevin Skadron, John Lach: Interconnect Lifetime Prediction for Reliability-Aware Systems. IEEE Trans. VLSI Syst. 15(2): 159-172 (2007)
55EEGarrett S. Rose, Yuxing Yao, James M. Tour, Adam C. Cabe, Nadine Gergel-Hackett, Nabanita Majumdar, John C. Bean, Lloyd R. Harriott, Mircea R. Stan: Designing CMOS/molecular memories while considering device parameter variations. JETC 3(1): (2007)
2006
54 Wolfgang Nebel, Mircea R. Stan, Anand Raghunathan, Jörg Henkel, Diana Marculescu: Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006 ACM 2006
53EEGarrett S. Rose, Adam C. Cabe, Nadine Gergel-Hackett, Nabanita Majumdar, Mircea R. Stan, John C. Bean, Lloyd R. Harriott, Yuxing Yao, James M. Tour: Design approaches for hybrid CMOS/molecular memory based on experimental device data. ACM Great Lakes Symposium on VLSI 2006: 2-7
52EEZhijian Lu, Yan Zhang, Mircea R. Stan, John Lach, Kevin Skadron: Procrastinating voltage scheduling with discrete frequency sets. DATE 2006: 456-461
51EEGarrett S. Rose, Mircea R. Stan: A programmable majority logic array using molecular scale electronics. FPGA 2006: 225
50EEMircea R. Stan, Garrett S. Rose, Matthew M. Ziegler: Hybrid CMOS/Molecular Electronic Circuits. VLSI Design 2006: 703-708
49EEWei Huang, Shougata Ghosh, Sivakumar Velusamy, Karthik Sankaranarayanan, Kevin Skadron, Mircea R. Stan: HotSpot: A Compact Thermal Modeling Methodology for Early-Stage VLSI Design. IEEE Trans. VLSI Syst. 14(5): 501-513 (2006)
2005
48EEYan Zhang, Zhijian Lu, John Lach, Kevin Skadron, Mircea R. Stan: Optimal procrastinating voltage scheduling for hard real-time systems. DAC 2005: 905-908
47EESivakumar Velusamy, Wei Huang, John Lach, Mircea R. Stan, Kevin Skadron: Monitoring Temperature in FPGA based SoCs. ICCD 2005: 634-640
46EEYan Zhang, Travis N. Blalock, Mircea R. Stan: A three-level toggle-avoid bus signaling scheme. ISCAS (2) 2005: 1843-1846
45EEWei Huang, Eric Humenay, Kevin Skadron, Mircea R. Stan: The need for a full-chip and package thermal model for thermally optimized IC designs. ISLPED 2005: 245-250
44EEZhijian Lu, John Lach, Mircea R. Stan, Kevin Skadron: Improved Thermal Management with Reliability Banking. IEEE Micro 25(6): 40-49 (2005)
2004
43EELei He, Weiping Liao, Mircea R. Stan: System level leakage reduction considering the interdependence of temperature and leakage. DAC 2004: 12-17
42EEWei Huang, Mircea R. Stan, Kevin Skadron, Karthik Sankaranarayanan, Shougata Ghosh, Sivakumar Velusamy: Compact thermal modeling for temperature-aware design. DAC 2004: 878-883
41EEMatthew M. Ziegler, Mircea R. Stan: A Unified Design Space for Regular Parallel Prefix Adders. DATE 2004: 1386-1387
40EEYingmin Li, Dharmesh Parikh, Yan Zhang, Karthik Sankaranarayanan, Mircea R. Stan, Kevin Skadron: State-Preserving vs. Non-State-Preserving Leakage Control in Caches. DATE 2004: 22-29
39EEZhijian Lu, Wei Huang, John Lach, Mircea R. Stan, Kevin Skadron: Interconnect lifetime prediction under dynamic stress for reliability-aware design. ICCAD 2004: 327-334
38 Mircea R. Stan: Systolic counters with unique zero state. ISCAS (2) 2004: 909-912
37EEMircea R. Stan, Yan Zhang: Perfect 3-Limited-Weight Code for Low Power I/O. PATMOS 2004: 79-89
36EEMircea R. Stan, Fatih Hamzaoglu, David Garrett: Non-Manhattan maze routing. SBCCI 2004: 260-265
35EEDharmesh Parikh, Kevin Skadron, Yan Zhang, Mircea R. Stan: Power-Aware Branch Prediction: Characterization and Design. IEEE Trans. Computers 53(2): 168-186 (2004)
34EEGarrett S. Rose, Matthew M. Ziegler, Mircea R. Stan: Large-signal two-terminal device model for nanoelectronic circuit analysis. IEEE Trans. VLSI Syst. 12(11): 1201-1208 (2004)
33EEKevin Skadron, Mircea R. Stan, Karthik Sankaranarayanan, Wei Huang, Sivakumar Velusamy, David Tarjan: Temperature-aware microarchitecture: Modeling and implementation. TACO 1(1): 94-125 (2004)
2003
32EEZhijian Lu, John Lach, Mircea R. Stan, Kevin Skadron: Reducing Multimedia Decode Power using Feedback Control. ICCD 2003: 489-
31EEKevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik Sankaranarayanan, David Tarjan: Temperature-Aware Microarchitecture. ISCA 2003: 2-13
30EEMatthew M. Ziegler, Mircea R. Stan: The CMOS/nano interface from a circuits perspective. ISCAS (4) 2003: 904-907
29EEMircea R. Stan, Marco Barcella: MTCMOS with outer feedback (MTOF) flip-flops. ISCAS (5) 2003: 429-432
28EEMircea R. Stan, Kevin Skadron: Guest Editors' Introduction: Power-Aware Computing. IEEE Computer 36(12): 35-38 (2003)
27EEKevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik Sankaranarayanan, David Tarjan: Temperature-Aware Computer Systems: Opportunities and Challenges. IEEE Micro 23(6): 52-61 (2003)
26 Zhijian Lu, John Lach, Mircea R. Stan, Kevin Skadron: Alloyed Branch History: Combining Global and Local Branch History for Robust Performance. International Journal of Parallel Programming 31(2): 137-177 (2003)
25EEMircea R. Stan, Kevin Skadron, Marco Barcella, Wei Huang, Karthik Sankaranarayanan, Sivakumar Velusamy: HotSpot: a dynamic compact thermal model at the processor-architecture level. Microelectronics Journal 34(12): 1153-1165 (2003)
2002
24EEZhijian Lu, Jason Hein, Marty Humphrey, Mircea R. Stan, John Lach, Kevin Skadron: Control-theoretic dynamic frequency and voltage scaling for multimedia workloads. CASES 2002: 156-163
23EEMircea R. Stan, Avishek Panigrahi: The Selective Pull-Up (SP) Noise Immunity Scheme for Dynamic Circuits. DATE 2002: 1106
22EEKevin Skadron, Tarek F. Abdelzaher, Mircea R. Stan: Control-Theoretic Techniques and Thermal-RC Modeling for Accurate and Localized Dynamic Thermal Management. HPCA 2002: 17-28
21EEDharmesh Parikh, Kevin Skadron, Yan Zhang, Marco Barcella, Mircea R. Stan: Power Issues Related to Branch Prediction. HPCA 2002: 233-
20EEMatthew M. Ziegler, Mircea R. Stan: A Case for CMOS/nano co-design. ICCAD 2002: 348-352
19EEFatih Hamzaoglu, Mircea R. Stan: Circuit-level techniques to control gate leakage for sub-100nm CMOS. ISLPED 2002: 60-63
18EEYan Zhang, John Lach, Kevin Skadron, Mircea R. Stan: Odd/even bus invert with two-phase transfer for buses with coupling. ISLPED 2002: 80-83
17EEMircea R. Stan: CMOS Circuits with Subvolt Supply Voltages. IEEE Design & Test of Computers 19(2): 34-43 (2002)
16EEFatih Hamzaoglu, Yibin Ye, Ali Keshavarzi, Kevin Zhang, Siva Narendra, Shekhar Borkar, Mircea R. Stan, Vivek De: Analysis of dual-VT SRAM cells with full-swing single-ended bit line sensing for on-chip cache. IEEE Trans. VLSI Syst. 10(2): 91-95 (2002)
2001
15EEJoshua L. Garrett, Mircea R. Stan: Active threshold compensation circuit for improved performance in cooled CMOS systems. ISCAS (4) 2001: 410-413
14EEDavid Garrett, Mircea R. Stan: A 2.5 Mb/s, 23 mW SOVA traceback chip for turbo decoding applications. ISCAS (4) 2001: 61-64
13EEMircea R. Stan: Low-power CMOS with subvolt supply voltages. IEEE Trans. VLSI Syst. 9(2): 394-400 (2001)
1999
12EEDavid Garrett, Mircea R. Stan, Alvar Dean: Challenges in clockgating for a low power ASIC methodology. ISLPED 1999: 176-181
11EEMircea R. Stan: Optimal Voltages and Sizing for Low Power. VLSI Design 1999: 428-433
1998
10EEDavid Garrett, Mircea R. Stan: Low power architecture of the soft-output Viterbi algorithm. ISLPED 1998: 262-267
9EEMircea R. Stan: Low threshold CMOS circuits with low standby current. ISLPED 1998: 97-99
8 Mircea R. Stan, Alexandre F. Tenca, Milos D. Ercegovac: Long and Fast Up/Down Counters. IEEE Trans. Computers 47(7): 722-735 (1998)
1997
7EEMircea R. Stan: Synchronous Up/Down Counter with Clock Period Independent of Counter Size. IEEE Symposium on Computer Arithmetic 1997: 274-281
6EEDavid Garrett, Mircea R. Stan: Power reduction techniques for a spread spectrum based correlator. ISLPED 1997: 225-230
5EEMircea R. Stan, Wayne P. Burleson: Low-power encodings for global communication in CMOS VLSI. IEEE Trans. VLSI Syst. 5(4): 444-455 (1997)
1996
4EEMircea R. Stan, Wayne P. Burleson: Two dimensional codes for low power. ISLPED 1996: 335-340
1995
3EEMircea R. Stan, Wayne P. Burleson: Coding a terminated bus for low power. Great Lakes Symposium on VLSI 1995: 70-73
2EEMircea R. Stan, Wayne P. Burleson: Bus-invert coding for low-power I/O. IEEE Trans. VLSI Syst. 3(1): 49-58 (1995)
1994
1EEMircea R. Stan, Wayne P. Burleson, Christopher I. Connolly, Roderic A. Grupen: Analog VLSI for robot path planning. VLSI Signal Processing 8(1): 61-73 (1994)

Coauthor Index

1Tarek F. Abdelzaher [22]
2Marco Barcella [21] [25] [29]
3John C. Bean [53] [55]
4Travis N. Blalock [46] [67]
5Shekhar Y. Borkar (Shekhar Borkar) [16]
6Wayne P. Burleson (Wayne Burleson) [1] [2] [3] [4] [5]
7Adam C. Cabe [53] [55] [67]
8Christopher I. Connolly [1]
9Vivek De [16]
10Alvar Dean [12]
11Gary S. Ditlow [60]
12Milos D. Ercegovac [8]
13David Garrett [6] [10] [12] [14] [36]
14Joshua L. Garrett [15]
15Nadine Gergel-Hackett [53] [55]
16Shougata Ghosh [42] [49]
17Roderic A. Grupen [1]
18Sudhanva Gurumurthi [58] [62] [63] [66]
19Fatih Hamzaoglu [16] [19] [36]
20Lloyd R. Harriott [53] [55]
21Lei He [43]
22Jason Hein [24]
23Jörg Henkel [54]
24Wei Huang [25] [27] [31] [33] [39] [42] [45] [47] [49] [56] [61] [64]
25Eric Humenay [45]
26Marty Humphrey (Marty A. Humphrey) [24]
27Ali Keshavarzi [16]
28Stephen V. Kosonocky [57] [60]
29John Lach [18] [24] [26] [32] [39] [44] [47] [48] [52] [56]
30Yingmin Li [40]
31Weiping Liao [43]
32Zhijian Lu [24] [26] [32] [39] [44] [48] [52] [56]
33Nabanita Majumdar [53] [55]
34Diana Marculescu [54]
35Siva Narendra [16]
36Wolfgang Nebel [54]
37Avishek Panigrahi [23]
38Dharmesh Parikh [21] [35] [40]
39Zhenyu Qi [57] [60] [65] [67]
40Jan M. Rabaey [57]
41Anand Raghunathan [54]
42Robert J. Ribando [61] [64]
43Garrett S. Rose [34] [50] [51] [53] [55]
44S. Sankar [66]
45Sriram Sankar [62] [63]
46Karthik Sankaranarayanan [25] [27] [31] [33] [40] [42] [49] [61] [64]
47Kevin Skadron [18] [21] [22] [24] [25] [26] [27] [28] [31] [32] [33] [35] [39] [40] [42] [44] [45] [47] [48] [49] [52] [56] [61] [64]
48David Tarjan [27] [31] [33]
49Alexandre F. Tenca [8]
50James M. Tour [53] [55]
51Sivakumar Velusamy [25] [27] [31] [33] [42] [47] [49]
52Stuart N. Wooters [67]
53Yuxing Yao [53] [55]
54Yibin Ye [16]
55Kevin Zhang [16]
56Yan Zhang [18] [21] [35] [37] [40] [46] [48] [52] [58] [59] [66]
57Matthew M. Ziegler [20] [30] [34] [41] [50] [57] [60]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)