2009 |
67 | EE | Adam C. Cabe,
Zhenyu Qi,
Stuart N. Wooters,
Travis N. Blalock,
Mircea R. Stan:
Small embeddable NBTI sensors (SENS) for tracking on-chip performance decay.
ISQED 2009: 1-6 |
66 | EE | S. Sankar,
Yan Zhang,
Sudhanva Gurumurthi,
Mircea R. Stan:
Sensitivity-Based Optimization of Disk Architecture.
IEEE Trans. Computers 58(1): 69-81 (2009) |
2008 |
65 | EE | Zhenyu Qi,
Mircea R. Stan:
NBTI resilient circuits using adaptive body biasing.
ACM Great Lakes Symposium on VLSI 2008: 285-290 |
64 | EE | Wei Huang,
Mircea R. Stan,
Karthik Sankaranarayanan,
Robert J. Ribando,
Kevin Skadron:
Many-core design from a thermal perspective.
DAC 2008: 746-749 |
63 | EE | Sriram Sankar,
Sudhanva Gurumurthi,
Mircea R. Stan:
Intra-disk Parallelism: An Idea Whose Time Has Come.
ISCA 2008: 303-314 |
62 | | Sriram Sankar,
Sudhanva Gurumurthi,
Mircea R. Stan:
Sensitivity Based Power Management of Enterprise Storage Systems.
MASCOTS 2008: 93-102 |
61 | EE | Wei Huang,
Karthik Sankaranarayanan,
Kevin Skadron,
Robert J. Ribando,
Mircea R. Stan:
Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model.
IEEE Trans. Computers 57(9): 1277-1288 (2008) |
2007 |
60 | EE | Matthew M. Ziegler,
Gary S. Ditlow,
Stephen V. Kosonocky,
Zhenyu Qi,
Mircea R. Stan:
Structured and tuned array generation (STAG) for high-performance random logic.
ACM Great Lakes Symposium on VLSI 2007: 257-262 |
59 | EE | Yan Zhang,
Mircea R. Stan:
Temperature-aware circuit design using adaptive body biasing.
ACM Great Lakes Symposium on VLSI 2007: 84-89 |
58 | EE | Yan Zhang,
Sudhanva Gurumurthi,
Mircea R. Stan:
SODA: Sensitivity Based Optimization of Disk Architecture.
DAC 2007: 865-870 |
57 | EE | Zhenyu Qi,
Matthew M. Ziegler,
Stephen V. Kosonocky,
Jan M. Rabaey,
Mircea R. Stan:
Multi-Dimensional Circuit and Micro-Architecture Level Optimization.
ISQED 2007: 275-280 |
56 | EE | Zhijian Lu,
Wei Huang,
Mircea R. Stan,
Kevin Skadron,
John Lach:
Interconnect Lifetime Prediction for Reliability-Aware Systems.
IEEE Trans. VLSI Syst. 15(2): 159-172 (2007) |
55 | EE | Garrett S. Rose,
Yuxing Yao,
James M. Tour,
Adam C. Cabe,
Nadine Gergel-Hackett,
Nabanita Majumdar,
John C. Bean,
Lloyd R. Harriott,
Mircea R. Stan:
Designing CMOS/molecular memories while considering device parameter variations.
JETC 3(1): (2007) |
2006 |
54 | | Wolfgang Nebel,
Mircea R. Stan,
Anand Raghunathan,
Jörg Henkel,
Diana Marculescu:
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006
ACM 2006 |
53 | EE | Garrett S. Rose,
Adam C. Cabe,
Nadine Gergel-Hackett,
Nabanita Majumdar,
Mircea R. Stan,
John C. Bean,
Lloyd R. Harriott,
Yuxing Yao,
James M. Tour:
Design approaches for hybrid CMOS/molecular memory based on experimental device data.
ACM Great Lakes Symposium on VLSI 2006: 2-7 |
52 | EE | Zhijian Lu,
Yan Zhang,
Mircea R. Stan,
John Lach,
Kevin Skadron:
Procrastinating voltage scheduling with discrete frequency sets.
DATE 2006: 456-461 |
51 | EE | Garrett S. Rose,
Mircea R. Stan:
A programmable majority logic array using molecular scale electronics.
FPGA 2006: 225 |
50 | EE | Mircea R. Stan,
Garrett S. Rose,
Matthew M. Ziegler:
Hybrid CMOS/Molecular Electronic Circuits.
VLSI Design 2006: 703-708 |
49 | EE | Wei Huang,
Shougata Ghosh,
Sivakumar Velusamy,
Karthik Sankaranarayanan,
Kevin Skadron,
Mircea R. Stan:
HotSpot: A Compact Thermal Modeling Methodology for Early-Stage VLSI Design.
IEEE Trans. VLSI Syst. 14(5): 501-513 (2006) |
2005 |
48 | EE | Yan Zhang,
Zhijian Lu,
John Lach,
Kevin Skadron,
Mircea R. Stan:
Optimal procrastinating voltage scheduling for hard real-time systems.
DAC 2005: 905-908 |
47 | EE | Sivakumar Velusamy,
Wei Huang,
John Lach,
Mircea R. Stan,
Kevin Skadron:
Monitoring Temperature in FPGA based SoCs.
ICCD 2005: 634-640 |
46 | EE | Yan Zhang,
Travis N. Blalock,
Mircea R. Stan:
A three-level toggle-avoid bus signaling scheme.
ISCAS (2) 2005: 1843-1846 |
45 | EE | Wei Huang,
Eric Humenay,
Kevin Skadron,
Mircea R. Stan:
The need for a full-chip and package thermal model for thermally optimized IC designs.
ISLPED 2005: 245-250 |
44 | EE | Zhijian Lu,
John Lach,
Mircea R. Stan,
Kevin Skadron:
Improved Thermal Management with Reliability Banking.
IEEE Micro 25(6): 40-49 (2005) |
2004 |
43 | EE | Lei He,
Weiping Liao,
Mircea R. Stan:
System level leakage reduction considering the interdependence of temperature and leakage.
DAC 2004: 12-17 |
42 | EE | Wei Huang,
Mircea R. Stan,
Kevin Skadron,
Karthik Sankaranarayanan,
Shougata Ghosh,
Sivakumar Velusamy:
Compact thermal modeling for temperature-aware design.
DAC 2004: 878-883 |
41 | EE | Matthew M. Ziegler,
Mircea R. Stan:
A Unified Design Space for Regular Parallel Prefix Adders.
DATE 2004: 1386-1387 |
40 | EE | Yingmin Li,
Dharmesh Parikh,
Yan Zhang,
Karthik Sankaranarayanan,
Mircea R. Stan,
Kevin Skadron:
State-Preserving vs. Non-State-Preserving Leakage Control in Caches.
DATE 2004: 22-29 |
39 | EE | Zhijian Lu,
Wei Huang,
John Lach,
Mircea R. Stan,
Kevin Skadron:
Interconnect lifetime prediction under dynamic stress for reliability-aware design.
ICCAD 2004: 327-334 |
38 | | Mircea R. Stan:
Systolic counters with unique zero state.
ISCAS (2) 2004: 909-912 |
37 | EE | Mircea R. Stan,
Yan Zhang:
Perfect 3-Limited-Weight Code for Low Power I/O.
PATMOS 2004: 79-89 |
36 | EE | Mircea R. Stan,
Fatih Hamzaoglu,
David Garrett:
Non-Manhattan maze routing.
SBCCI 2004: 260-265 |
35 | EE | Dharmesh Parikh,
Kevin Skadron,
Yan Zhang,
Mircea R. Stan:
Power-Aware Branch Prediction: Characterization and Design.
IEEE Trans. Computers 53(2): 168-186 (2004) |
34 | EE | Garrett S. Rose,
Matthew M. Ziegler,
Mircea R. Stan:
Large-signal two-terminal device model for nanoelectronic circuit analysis.
IEEE Trans. VLSI Syst. 12(11): 1201-1208 (2004) |
33 | EE | Kevin Skadron,
Mircea R. Stan,
Karthik Sankaranarayanan,
Wei Huang,
Sivakumar Velusamy,
David Tarjan:
Temperature-aware microarchitecture: Modeling and implementation.
TACO 1(1): 94-125 (2004) |
2003 |
32 | EE | Zhijian Lu,
John Lach,
Mircea R. Stan,
Kevin Skadron:
Reducing Multimedia Decode Power using Feedback Control.
ICCD 2003: 489- |
31 | EE | Kevin Skadron,
Mircea R. Stan,
Wei Huang,
Sivakumar Velusamy,
Karthik Sankaranarayanan,
David Tarjan:
Temperature-Aware Microarchitecture.
ISCA 2003: 2-13 |
30 | EE | Matthew M. Ziegler,
Mircea R. Stan:
The CMOS/nano interface from a circuits perspective.
ISCAS (4) 2003: 904-907 |
29 | EE | Mircea R. Stan,
Marco Barcella:
MTCMOS with outer feedback (MTOF) flip-flops.
ISCAS (5) 2003: 429-432 |
28 | EE | Mircea R. Stan,
Kevin Skadron:
Guest Editors' Introduction: Power-Aware Computing.
IEEE Computer 36(12): 35-38 (2003) |
27 | EE | Kevin Skadron,
Mircea R. Stan,
Wei Huang,
Sivakumar Velusamy,
Karthik Sankaranarayanan,
David Tarjan:
Temperature-Aware Computer Systems: Opportunities and Challenges.
IEEE Micro 23(6): 52-61 (2003) |
26 | | Zhijian Lu,
John Lach,
Mircea R. Stan,
Kevin Skadron:
Alloyed Branch History: Combining Global and Local Branch History for Robust Performance.
International Journal of Parallel Programming 31(2): 137-177 (2003) |
25 | EE | Mircea R. Stan,
Kevin Skadron,
Marco Barcella,
Wei Huang,
Karthik Sankaranarayanan,
Sivakumar Velusamy:
HotSpot: a dynamic compact thermal model at the processor-architecture level.
Microelectronics Journal 34(12): 1153-1165 (2003) |
2002 |
24 | EE | Zhijian Lu,
Jason Hein,
Marty Humphrey,
Mircea R. Stan,
John Lach,
Kevin Skadron:
Control-theoretic dynamic frequency and voltage scaling for multimedia workloads.
CASES 2002: 156-163 |
23 | EE | Mircea R. Stan,
Avishek Panigrahi:
The Selective Pull-Up (SP) Noise Immunity Scheme for Dynamic Circuits.
DATE 2002: 1106 |
22 | EE | Kevin Skadron,
Tarek F. Abdelzaher,
Mircea R. Stan:
Control-Theoretic Techniques and Thermal-RC Modeling for Accurate and Localized Dynamic Thermal Management.
HPCA 2002: 17-28 |
21 | EE | Dharmesh Parikh,
Kevin Skadron,
Yan Zhang,
Marco Barcella,
Mircea R. Stan:
Power Issues Related to Branch Prediction.
HPCA 2002: 233- |
20 | EE | Matthew M. Ziegler,
Mircea R. Stan:
A Case for CMOS/nano co-design.
ICCAD 2002: 348-352 |
19 | EE | Fatih Hamzaoglu,
Mircea R. Stan:
Circuit-level techniques to control gate leakage for sub-100nm CMOS.
ISLPED 2002: 60-63 |
18 | EE | Yan Zhang,
John Lach,
Kevin Skadron,
Mircea R. Stan:
Odd/even bus invert with two-phase transfer for buses with coupling.
ISLPED 2002: 80-83 |
17 | EE | Mircea R. Stan:
CMOS Circuits with Subvolt Supply Voltages.
IEEE Design & Test of Computers 19(2): 34-43 (2002) |
16 | EE | Fatih Hamzaoglu,
Yibin Ye,
Ali Keshavarzi,
Kevin Zhang,
Siva Narendra,
Shekhar Borkar,
Mircea R. Stan,
Vivek De:
Analysis of dual-VT SRAM cells with full-swing single-ended bit line sensing for on-chip cache.
IEEE Trans. VLSI Syst. 10(2): 91-95 (2002) |
2001 |
15 | EE | Joshua L. Garrett,
Mircea R. Stan:
Active threshold compensation circuit for improved performance in cooled CMOS systems.
ISCAS (4) 2001: 410-413 |
14 | EE | David Garrett,
Mircea R. Stan:
A 2.5 Mb/s, 23 mW SOVA traceback chip for turbo decoding applications.
ISCAS (4) 2001: 61-64 |
13 | EE | Mircea R. Stan:
Low-power CMOS with subvolt supply voltages.
IEEE Trans. VLSI Syst. 9(2): 394-400 (2001) |
1999 |
12 | EE | David Garrett,
Mircea R. Stan,
Alvar Dean:
Challenges in clockgating for a low power ASIC methodology.
ISLPED 1999: 176-181 |
11 | EE | Mircea R. Stan:
Optimal Voltages and Sizing for Low Power.
VLSI Design 1999: 428-433 |
1998 |
10 | EE | David Garrett,
Mircea R. Stan:
Low power architecture of the soft-output Viterbi algorithm.
ISLPED 1998: 262-267 |
9 | EE | Mircea R. Stan:
Low threshold CMOS circuits with low standby current.
ISLPED 1998: 97-99 |
8 | | Mircea R. Stan,
Alexandre F. Tenca,
Milos D. Ercegovac:
Long and Fast Up/Down Counters.
IEEE Trans. Computers 47(7): 722-735 (1998) |
1997 |
7 | EE | Mircea R. Stan:
Synchronous Up/Down Counter with Clock Period Independent of Counter Size.
IEEE Symposium on Computer Arithmetic 1997: 274-281 |
6 | EE | David Garrett,
Mircea R. Stan:
Power reduction techniques for a spread spectrum based correlator.
ISLPED 1997: 225-230 |
5 | EE | Mircea R. Stan,
Wayne P. Burleson:
Low-power encodings for global communication in CMOS VLSI.
IEEE Trans. VLSI Syst. 5(4): 444-455 (1997) |
1996 |
4 | EE | Mircea R. Stan,
Wayne P. Burleson:
Two dimensional codes for low power.
ISLPED 1996: 335-340 |
1995 |
3 | EE | Mircea R. Stan,
Wayne P. Burleson:
Coding a terminated bus for low power.
Great Lakes Symposium on VLSI 1995: 70-73 |
2 | EE | Mircea R. Stan,
Wayne P. Burleson:
Bus-invert coding for low-power I/O.
IEEE Trans. VLSI Syst. 3(1): 49-58 (1995) |
1994 |
1 | EE | Mircea R. Stan,
Wayne P. Burleson,
Christopher I. Connolly,
Roderic A. Grupen:
Analog VLSI for robot path planning.
VLSI Signal Processing 8(1): 61-73 (1994) |