Seung Hoon Choi

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8EESeung Hoon Choi, Bipul Chandra Paul, Kaushik Roy: Novel sizing algorithm for yield improvement under process variation in nanometer technology. DAC 2004: 454-459
7EESeung Hoon Choi: Component Reconfiguration Tool for Software Product Lines with XML Technology. WISE 2004: 572-583
6EESeung Hoon Choi, Kaushik Roy: A New Crosstalk Noise Model for DOMINO Logic Circuits. DATE 2003: 11112-11113
5EESeung Hoon Choi, Kaushik Roy, Florentin Dartu: Timed pattern generation for noise-on-delay calculation. DAC 2002: 870-873
4EESeung Hoon Choi, Kaushik Roy: Noise Analysis under Capacitive and Inductive Coupling for High Speed Circuits. DELTA 2002: 365-369
3EESeung Hoon Choi, Bipul Chandra Paul, Kaushik Roy: Dynamic Noise Analysis with Capacitive and Inductive Coupling. VLSI Design 2002: 65-70
2EEBipul Chandra Paul, Seung Hoon Choi, Yonghee Im, Kaushik Roy: Design Verification and Robust Design Technique for Cross-Talk Faults. Asian Test Symposium 2001: 449-
1EEDinesh Somasekhar, Seung Hoon Choi, Kaushik Roy, Yibin Ye, Vivek De: Dynamic noise analysis in precharge-evaluate circuits. DAC 2000: 243

Coauthor Index

1Florentin Dartu [5]
2Vivek De [1]
3Yonghee Im [2]
4Bipul Chandra Paul (Bipul C. Paul) [2] [3] [8]
5Kaushik Roy [1] [2] [3] [4] [5] [6] [8]
6Dinesh Somasekhar [1]
7Yibin Ye [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)