Prithviraj Banerjee

Prith Banerjee

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2009

247 EE Gaurav Mittal, David Zaretsky, Prithviraj Banerjee: Streaming implementation of a sequential decompression algorithm on an FPGA. FPGA 2009: 283

246 EE Prith Banerjee: An intelligent IT infrastructure for the future. HPCA 2009: 3-4

245 EE Lei Gao, David Zaretsky, Gaurav Mittal, Dan Schonfeld, Prith Banerjee: A software pipelining algorithm in high-level synthesis for FPGA architectures. ISQED 2009: 297-302

2008

244 EE Nikolaos D. Liveris, Hai Zhou, Prithviraj Banerjee: A dynamic-programming algorithm for reducing the energy consumption of pipelined System-Level streaming applications. ASP-DAC 2008: 42-48

243 EE Nikolaos D. Liveris, Hai Zhou, Robert P. Dick, Prithviraj Banerjee: State space abstraction for parameterized self-stabilizing embedded systems. EMSOFT 2008: 11-20

2007

242 EE Nikolaos D. Liveris, Chuan Lin, J. Wang, Hai Zhou, Prithviraj Banerjee: Retiming for Synchronous Data Flow Graphs. ASP-DAC 2007: 480-485

241 EE David Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee: Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs. ISQED 2007: 595-601

240 EE Gaurav Mittal, David Zaretsky, Xiaoyong Tang, Prithviraj Banerjee: An Overview of a Compiler for Mapping Software Binaries to Hardware. IEEE Trans. VLSI Syst. 15(11): 1177-1190 (2007)

239 EE Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou: Low-Power Optimization by Smart Bit-Width Allocation in a SystemC-Based ASIC Design Environment. IEEE Trans. on CAD of Integrated Circuits and Systems 26(3): 447-455 (2007)

238 EE Pramod G. Joisha, Prithviraj Banerjee: A translator system for the MATLAB language. Softw., Pract. Exper. 37(5): 535-578 (2007)

2006

237 EE Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou: Smart bit-width allocation for low power optimization in a systemc based ASIC design environment. DATE 2006: 618-623

236 EE David Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee: Dynamic Template Generation for Resource Sharing in Control and Data Flow Graphs. VLSI Design 2006: 465-468

235 EE Pramod G. Joisha, Prithviraj Banerjee: An algebraic array shape inference system for MATLAB. ACM Trans. Program. Lang. Syst. 28(5): 848-907 (2006)

2005

234 EE Gaurav Mittal, David Zaretsky, Gokhan Memik, Prith Banerjee: Automatic extraction of function bodies from software binaries. ASP-DAC 2005: 928-931

233 EE Nikolaos D. Liveris, Hai Zhou, Prithviraj Banerjee: An Efficient System-Level to RTL Verification Framework for Computation-Intensive Applications. Asian Test Symposium 2005: 28-33

232 EE Xiaoyong Tang, Hai Zhou, Prithviraj Banerjee: Leakage power optimization with dual-V_th library in high-level synthesis. DAC 2005: 202-207

231 EE David Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee: Generation of Control and Data Flow Graphs from Scheduled and Pipelined Assembly Code. LCPC 2005: 76-90

230 EE Xiaoyong Tang, Tianyi Jiang, Alex K. Jones, Prithviraj Banerjee: Behavioral Synthesis of Data-Dominated Circuits for Minimal Energy Implementation. VLSI Design 2005: 267-273

229 EE Sanghamitra Roy, Prith Banerjee: An Algorithm for Trading Off Quantization Error with Hardware Resources for MATLAB-Based FPGA Design. IEEE Trans. Computers 54(7): 886-896 (2005)

228 EE Xiaoyong Tang, Tianyi Jiang, Alex K. Jones, Prithviraj Banerjee: High-Level Synthesis for Low Power Hardware Implementation of Unscheduled Data-Dominated Circuits. J. Low Power Electronics 1(3): 259-272 (2005)

2004

227 EE Tianyi Jiang, Xiaoyong Tang, Prithviraj Banerjee: Macro-models for high level area and power estimation on FPGAs. ACM Great Lakes Symposium on VLSI 2004: 162-165

226 EE David Zaretsky, Gaurav Mittal, Xiaoyong Tang, Prithviraj Banerjee: Evaluation of scheduling and allocation algorithms while mapping assembly code onto FPGAs. ACM Great Lakes Symposium on VLSI 2004: 397-400

225 EE Gaurav Mittal, David Zaretsky, Xiaoyong Tang, Prithviraj Banerjee: Automatic translation of software binaries onto FPGAs. DAC 2004: 389-394

224 EE Sanghamitra Roy, Prithviraj Banerjee: An algorithm for converting floating-point computations to fixed-point in MATLAB based FPGA design. DAC 2004: 484-487

223 EE Nikolaos D. Liveris, Prithviraj Banerjee: Power Aware Interface Synthesis for Bus-Based SoC Design. DATE 2004: 864-869

222 EE David Zaretsky, Gaurav Mittal, Xiaoyong Tang, Prithviraj Banerjee: Overview of the FREEDOM Compiler for Mapping DSP Software to FPGAs. FCCM 2004: 37-46

221 EE Tianyi Jiang, Xiaoyong Tang, Prithviraj Banerjee: High level area, delay and power estimation for FPGAs. FPGA 2004: 249

220 EE Sanghamitra Roy, Debjit Sinha, Prithviraj Banerjee: An algorithm for trading off quantization error with hardware resources for MATLAB based FPGA design. FPGA 2004: 256

219 EE Rajarshi Mukherjee, Alex K. Jones, Prithviraj Banerjee: Handling Data Streams while Compiling C Programs onto Hardware. ISVLSI 2004: 271-272

218 Prithviraj Banerjee, Malay Haldar, Anshuman Nayak, Victor Kim, Vikram Saxena, Steven Parkes, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, David Zaretsky, R. Anderson, J. R. Uribe: Overview of a compiler for synthesizing MATLAB programs onto FPGAs. IEEE Trans. VLSI Syst. 12(3): 312-324 (2004)

2003

217 EE Pramod G. Joisha, Prithviraj Banerjee: The MAGICA Type Inference Engine for MATLAB. CC 2003: 121-125

216 EE Prithviraj Banerjee, Debabrata Bagchi, Malay Haldar, Anshuman Nayak, Victor Kim, R. Uribe: Automatic Conversion of Floating Point MATLAB Programs into Fixed Point FPGA Based Hardware Design. FCCM 2003: 263-264

215 EE Alex K. Jones, Prithviraj Banerjee: An Automated and Power-Aware Framework for Utilization of IP Cores in Hardware Generated from C Descriptions Targeting FPGAs. FCCM 2003: 284-285

214 EE Prithviraj Banerjee, Vikram Saxena, J. R. Uribe, Malay Haldar, Anshuman Nayak, Victor Kim, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, R. Anderson: Making area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs. FPGA 2003: 237

213 EE Alex K. Jones, Prithviraj Banerjee: An automated and power-aware framework for utilization of IP cores in hardware generated from C descriptions targeting FPGAs. FPGA 2003: 244

212 EE Pramod G. Joisha, Prithviraj Banerjee: Static array storage optimization in MATLAB. PLDI 2003: 258-268

211 EE Amitabh Mishra, Prithviraj Banerjee: An Algorithm-Based Error Detection Scheme for the Multigrid Method. IEEE Trans. Computers 52(9): 1089-1099 (2003)

210 EE Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee: Reducing False Sharing and Improving Spatial Locality in a Unified Compilation Framework. IEEE Trans. Parallel Distrib. Syst. 14(4): 337-354 (2003)

2002

209 EE Alex K. Jones, Debabrata Bagchi, Satrajit Pal, Xiaoyong Tang, Alok N. Choudhary, Prithviraj Banerjee: PACT HDL: a C compiler targeting ASICs and FPGAs with power and performance optimizations. CASES 2002: 188-197

208 EE Anshuman Nayak, Malay Haldar, Alok N. Choudhary, Prithviraj Banerjee: Accurate Area and Delay Estimators for FPGAs. DATE 2002: 862-869

207 EE Prithviraj Banerjee, Malay Haldar, Anshuman Nayak, Victor Kim, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi: A Behavioral Synthesis Tool for Exploiting Fine Grain Parallelism in FPGAs. IWDC 2002: 246-256

206 EE Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee: Automatic Parallelization of Compiled Event Driven VHDL Simulation. IEEE Trans. Computers 51(4): 380-394 (2002)

2001

205 EE Pramod G. Joisha, Prithviraj Banerjee: Correctly detecting intrinsic type errors in typeless languages such as MATLAB. APL 2001: 7-21

204 EE Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee: Automated synthesis of pipelined designs on FPGAs for signal and image processing applications described in MATLAB. ASP-DAC 2001: 645-648

203 EE Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee: Compiler Optimization of Dynamic Data Distributions for Distributed-Memory Multicomputers. Compiler Optimizations for Scalable Parallel Systems Languages 2001: 445-484

202 EE Anshuman Nayak, Malay Haldar, Alok N. Choudhary, Prithviraj Banerjee: Precision and error analysis of MATLAB applications during automated hardware synthesis for FPGAs. DATE 2001: 722-728

201 EE Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee: A System for Synthesizing Optimized FPGA Hardware from MATLAB. ICCAD 2001: 314-319

200 EE Dhruva R. Chakrabarti, Prithviraj Banerjee: Global optimization techniques for automatic parallelization of hybrid applications. ICS 2001: 166-180

199 EE Pramod G. Joisha, U. Nagaraj Shenoy, Prithviraj Banerjee: Computing Array Shapes in MATLAB. LCPC 2001: 395-410

198 EE Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee, U. Nagaraj Shenoy: Fpga Hardware Synthesis From Matlab. VLSI Design 2001: 299-304

197 EE U. Nagaraj Shenoy, Prithviraj Banerjee, Alok N. Choudhary, Mahmut T. Kandemir: Efficient Synthesis of Array Intensive Computations onto FPGA Based Accelerators. VLSI Design 2001: 305-310

196 EE Pramod G. Joisha, Abhay Kanhere, Prithviraj Banerjee, U. Nagaraj Shenoy, Alok N. Choudhary: Handling context-sensitive syntactic issues in the design of a front-end for a MATLAB compiler. ACM SIGAPL APL Quote Quad 31(3): 27-40 (2001)

195 EE U. Nagaraj Shenoy, Alok N. Choudhary, Prithviraj Banerjee: An algorithm for synthesis of large time-constrained heterogeneous adaptive systems. ACM Trans. Design Autom. Electr. Syst. 6(2): 207-225 (2001)

194 EE Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary, Prithviraj Banerjee: A Layout-Conscious Iteration Space Transformation Technique. IEEE Trans. Computers 50(12): 1321-1336 (2001)

193 EE Pramod G. Joisha, Prithviraj Banerjee: The Efficient Computation of Ownership Sets in HPF. IEEE Trans. Parallel Distrib. Syst. 12(8): 769-788 (2001)

192 EE Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Eduard Ayguadé: Static and Dynamic Locality Optimizations Using Integer Linear Programming. IEEE Trans. Parallel Distrib. Syst. 12(9): 922-941 (2001)

191 Dhruva R. Chakrabarti, Prithviraj Banerjee: Static Single Assignment Form for Message-Passing Programs. International Journal of Parallel Programming 29(2): 139-184 (2001)

190 EE Yanhong Yuan, Prithviraj Banerjee: A Parallel Implementation of a Fast Multipole-Based 3-D Capacitance Extraction Program on Distributed Memory Multicomputers. J. Parallel Distrib. Comput. 61(12): 1751-1774 (2001)

2000

189 Majid Sarrafzadeh, Prithviraj Banerjee, Kaushik Roy: Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, Chicago, Illinois, USA, March 2-4, 2000 ACM 2000

188 EE Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee: Parallel algorithms for FPGA placement. ACM Great Lakes Symposium on VLSI 2000: 86-94

187 EE Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee: Scheduling algorithms for automated synthesis of pipelined designs on FPGAs for applications described in MATLAB. CASES 2000: 85-93

186 EE U. Nagaraj Shenoy, Prithviraj Banerjee, Alok N. Choudhary: A System-Level Synthesis Algorithm with Guaranteed Solution Quality. DATE 2000: 417-

185 EE Prithviraj Banerjee, U. Nagaraj Shenoy, Alok N. Choudhary, Scott Hauck, C. Bachmann, Malay Haldar, Pramod G. Joisha, Alex K. Jones, Abhay Kanhere, Anshuman Nayak, S. Periyacheri, M. Walkden, David Zaretsky: A MATLAB Compiler for Distributed, Heterogeneous, Reconfigurable Computing Systems. FCCM 2000: 39-48

184 EE Zhi Alex Ye, U. Nagaraj Shenoy, Prithviraj Banerjee: A C compiler for a processor with a reconfigurable functional unit. FPGA 2000: 95-100

183 EE Yanhong Yuan, Prithviraj Banerjee: Comparative Study of Parallel Algorithms for 3-D Capacitance Extraction on Distributed Memory Multiprocessors. ICCD 2000: 133-

182 EE Malay Haldar, Anshuman Nayak, Abhay Kanhere, Pramod G. Joisha, U. Nagaraj Shenoy, Alok N. Choudhary, Prithviraj Banerjee: Match Virtual Machine: An Adaptive Runtime System to Execute MATLAB in Parallel. ICPP 2000: 145-152

181 EE Victor Kim, Prithviraj Banerjee, Kaushik De: Fine-Grained Parallel VLSI Synthesis for Commercial CAD on a Network of Workstations. ICPP 2000: 421-

180 EE Yanhong Yuan, Prithviraj Banerjee: A Parallel Implementation of a Fast Multipole Based 3-D Capacitance Extraction Program on Distributed Memory Multicomputer. IPDPS 2000: 323-330

179 EE Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithviraj Banerjee: CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit. ISCA 2000: 225-235

178 EE Pramod G. Joisha, Prithviraj Banerjee: Exploiting Ownership Sets in HPF. LCPC 2000: 259-273

177 EE Pramod G. Joisha, Prithviraj Banerjee: Correctly detecting intrinsic type errors in typeless languages such as MATLAB. ACM SIGAPL APL Quote Quad 31(2): 7-21 (2000)

176 EE Mahmut T. Kandemir, Alok N. Choudhary, Prithviraj Banerjee, J. Ramanujam, U. Nagaraj Shenoy: Minimizing Data and Synchronization Costs in One-Way Communication. IEEE Trans. Parallel Distrib. Syst. 11(12): 1232-1251 (2000)

175 EE Antonio Lain, Dhruva R. Chakrabarti, Prithviraj Banerjee: Compiler and Run-Time Support for Exploiting Regularity within Irregular Applications. IEEE Trans. Parallel Distrib. Syst. 11(2): 119-135 (2000)

1999

174 Prithviraj Banerjee, Viktor K. Prasanna, Bhabani P. Sinha: High Performance Computing - HiPC'99, 6th International Conference, Calcutta, India, December 17-20, 1999, Proceedings Springer 1999

173 EE Sumit Roy, Krishna P. Belkhale, Prithviraj Banerjee: An Approxmimate Algorithm for Delay-Constraint Technology Mapping. DAC 1999: 367-372

172 EE Amitabh Mishra, Prithviraj Banerjee: An Algorithm Based Error Detection Scheme for the Multigrid Algorithm. FTCS 1999: 12-19

171 EE Jim E. Crenshaw, Majid Sarrafzadeh, Prithviraj Banerjee, Pradeep Prabhakaran: An Incremental Floorplanner. Great Lakes Symposium on VLSI 1999: 248-251

170 EE Yanhong Yuan, Prithviraj Banerjee: ICE: Incremental 3-Dimensional Capacitance and Resistance Extraction for an Iterative Design Environment. Great Lakes Symposium on VLSI 1999: 64-67

169 Yanhong Yuan, Prithviraj Banerjee: A Parallel 3-D Capacitance Extraction Program. HiPC 1999: 202-206

168 EE Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee: A Framework for Interprocedural Locality Optimization Using Both Loop and Data Layout Transformations. ICPP 1999: 95-102

167 EE Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee: On Reducing False Sharing while Improving Locality on Shared Memory Multiprocessors. IEEE PACT 1999: 203-211

166 EE Dhruva R. Chakrabarti, Prithviraj Banerjee: A Novel Compilation Framework for Supporting Semi-Regular Distributions in Hybrid Applications. IPPS/SPDP 1999: 597-602

165 EE Pramod G. Joisha, Prithviraj Banerjee: PARADIGM (version 2.0): A New HPF Compilation System. IPPS/SPDP 1999: 609-615

164 EE Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee: A Graph Based Framework to Detect Optimal Memory Layouts for Improving Data Locality. IPPS/SPDP 1999: 738-743

163 EE Yanhong Yuan, Prithviraj Banerjee: Incremental capacitance extraction and its application to iterative timing-driven detailed routing. ISPD 1999: 42-47

162 EE Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Eduard Ayguadé: An integer linear programming approach for optimizing cache locality. International Conference on Supercomputing 1999: 500-509

161 EE Dhruva R. Chakrabarti, Prithviraj Banerjee: Accurate Data and Context Management in Message-Passing Programs. LCPC 1999: 117-132

160 Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee: Improving Locality Using a Graph-Based Technique for Detecting Memory Layouts of Arrays. PPSC 1999

159 EE Pradeep Prabhakaran, Prithviraj Banerjee, Jim E. Crenshaw, Majid Sarrafzadeh: Simultaneous Scheduling, Binding and Floorplanning for Interconnect Power Optimization. VLSI Design 1999: 423-427

158 EE Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, U. Nagaraj Shenoy: A global communication optimization technique based on data-flow analysis and linear algebra. ACM Trans. Program. Lang. Syst. 21(6): 1251-1297 (1999)

157 Pradeep Prabhakaran, Prithviraj Banerjee: Parallel Algorithms for Force Directed Scheduling of Flattened and Hierarchical Signal Flow Graphs. IEEE Trans. Computers 48(7): 762-768 (1999)

156 EE Mahmut T. Kandemir, Alok N. Choudhary, U. Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam: A Linear Algebra Framework for Automatic Determination of Optimal Data Layouts. IEEE Trans. Parallel Distrib. Syst. 10(2): 115-135 (1999)

155 John A. Chandy, Prithviraj Banerjee: A Parallel Circuit-Partitioned Algorithm for Timing-Driven Standard Cell Placement. J. Parallel Distrib. Comput. 57(1): 64-90 (1999)

154 Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee: A Matrix-Based Approach to Global Locality Optimization. J. Parallel Distrib. Comput. 58(2): 190-235 (1999)

1998

153 EE Maogang Wang, Prithviraj Banerjee, Majid Sarrafzadeh: Potential-NRG: Placement with Incomplete Data. DAC 1998: 279-282

152 EE Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee: An Implicit Algorithm for Finding Steady States and its Application to FSM Verification. DAC 1998: 611-614

151 EE Victor Kim, Prithviraj Banerjee: Parallel Algorithms for Power Estimation. DAC 1998: 672-677

150 EE Sumit Roy, Harm Arts, Prithviraj Banerjee: PowerShake: A Low Power Driven Clustering and Factoring Methodology for Boolean Expressions. DATE 1998: 967-968

149 EE Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, U. Nagaraj Shenoy, Prithviraj Banerjee: Enhancing Spatial Locality via Data Layout Optimizations. Euro-Par 1998: 422-434

148 EE Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee: Efficient equivalence checking of multi-phase designs using retiming. ICCAD 1998: 557-562

147 EE Sumit Roy, Harm Arts, Prithviraj Banerjee: PowerDrive: a fast, canonical POWER estimator for DRIVing synthEsis. ICCAD 1998: 601-606

146 EE Mahmut T. Kandemir, U. Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam, Alok N. Choudhary: Minimizing Data and Synchronization Costs in One-Way Communication. ICPP 1998: 180-188

145 EE Zhaoyun Xing, Prithviraj Banerjee: A Parallel Algorithm for Timing-driven Global Routing for Standard Cells. ICPP 1998: 54-61

144 EE Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee: A Matrix-Based Approach to the Global Locality Optimization Problem. IEEE PACT 1998: 306-313

143 EE Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, U. Nagaraj Shenoy: A Generalized Framework for Global Communication Optimization. IPPS/SPDP 1998: 69-73

142 EE Dhruva R. Chakrabarti, Prithviraj Banerjee, Antonio Lain: Evaluation of Compiler and Runtime Library Approaches for Supporting Parallel Regular Applications. IPPS/SPDP 1998: 74-79

141 EE Zhaoyun Xing, Prithviraj Banerjee: A parallel algorithm for zero skew clock tree routing. ISPD 1998: 118-123

140 EE Venkatram Krishnaswamy, Prithviraj Banerjee: Parallel Compiled Event Driven VHDL Simulation. International Conference on Supercomputing 1998: 297-304

139 EE Dhruva R. Chakrabarti, U. Nagaraj Shenoy, Alok N. Choudhary, Prithviraj Banerjee: An Efficient Uniform Run-time Scheme for Mixed Regular-irregular Applications. International Conference on Supercomputing 1998: 61-68

138 EE Mahmut T. Kandemir, Alok N. Choudhary, U. Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam: A Hyperplane Based Approach for Optimizing Spatial Locality in Loop Nests. International Conference on Supercomputing 1998: 69-76

137 EE Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary, Prithviraj Banerjee: A Loop Transformation Algorithm Based on Explicit Data Layout Representation for Optimizing Locality. LCPC 1998: 34-50

136 EE Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee: Improving Locality Using Loop and Data Transformations in an Integrated Framework. MICRO 1998: 285-297

135 EE Sumit Roy, Prithviraj Banerjee, Majid Sarrafzadeh: Partitioning sequential circuits for low power. VLSI Design 1998: 212-217

134 EE Pradeep Prabhakaran, Prithviraj Banerjee: Simultaneous Scheduling, Binding and Floorplanning in High-level Synthesis. VLSI Design 1998: 428-434

133 EE Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee: Efficient equivalence checking of multi-phase designs using phase abstraction and retiming. ACM Trans. Design Autom. Electr. Syst. 3(4): 600-625 (1998)

132 Gagan Hasteer, Prithviraj Banerjee: A Parallel Algorithm for State Assignment of Finite State Machines. IEEE Trans. Computers 47(2): 242-246 (1998)

1997

131 EE Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee: An Efficient Assertion Checker for Combinational Properties. DAC 1997: 734-739

130 EE John G. Holm, Steven Parkes, Prithviraj Banerjee: Performance Evaluation of a C++ Library Based Multithreaded System. HICSS (1) 1997: 282-291

129 John A. Chandy, Prithviraj Banerjee: A Parallel Circuit-Partitioned Algorithm for Timing Driven Cell Placement. ICCD 1997: 621-627

128 EE Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee: Load Balancing and Workload Minimization Of Overlapping Parallel Tasks. ICPP 1997: 272-279

127 EE Dilip Krishnaswamy, Prithviraj Banerjee: Exploiting task and data parallelism in parallel Hough and Radon transforms. ICPP 1997: 441-

126 EE Zhaoyun Xing, John A. Chandy, Prithviraj Banerjee: Parallel Global Routing Algorithms for Standard Cells. IPPS 1997: 527-

125 EE Sumit Roy, Prithviraj Banerjee: A Comparison of Parallel Approaches for Algebraic Factorization in Logic Synthesis. IPPS 1997: 665-671

124 EE John G. Holm, John A. Chandy, Steven Parkes, Sumit Roy, Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee: Performance Evaluation of Message-Driven Parallel VLSI CAD Applications on General Purpose Multiprocessors. International Conference on Supercomputing 1997: 172-179

123 EE Dilip Krishnaswamy, Michael S. Hsiao, Vikram Saxena, Elizabeth M. Rudnick, Janak H. Patel, Prithviraj Banerjee: Parallel Genetic Algorithms for Simulation-Based Sequential Circuit Test Generation. VLSI Design 1997: 475-481

122 EE Gagan Hasteer, Prithviraj Banerjee: Simulated Annealing Based Parallel State Assignment of Finite State Machines. VLSI Design 1997: 69-75

121 EE Dilip Krishnaswamy, Elizabeth M. Rudnick, Janak H. Patel, Prithviraj Banerjee: SPITFIRE: scalable parallel algorithms for test set partitioned fault simulation. VTS 1997: 274-281

120 EE Dilip Krishnaswamy, Prithviraj Banerjee, Elizabeth M. Rudnick, Janak H. Patel: Asynchronous Parallel Algorithms for Test Set Partitioned Fault Simulation. Workshop on Parallel and Distributed Simulation 1997: 30-37

119 EE Shankar Ramaswamy, Sachin S. Sapatnekar, Prithviraj Banerjee: A Framework for Exploiting Task and Data Parallelism on Distributed Memory Multicomputers. IEEE Trans. Parallel Distrib. Syst. 8(11): 1098-1116 (1997)

118 EE John A. Chandy, Sungho Kim, Balkrishna Ramkumar, Steven Parkes, Prithviraj Banerjee: An evaluation of parallel simulated annealing strategies with application to standard cell placement. IEEE Trans. on CAD of Integrated Circuits and Systems 16(4): 398-410 (1997)

117 EE Balkrishna Ramkumar, Prithviraj Banerjee: ProperTEST: a portable parallel test generator for sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 16(5): 555-569 (1997)

116 Gagan Hasteer, Prithviraj Banerjee: Simulated Annealing Based Parallel State Assignment of Finite State Machines. J. Parallel Distrib. Comput. 43(1): 21-35 (1997)

1996

115 Vamsi Boppana, Prashant Saxena, Prithviraj Banerjee, W. Kent Fuchs, C. L. Liu: A Parallel Algorithm for the Technology Mapping of LUT-Based FPGAs. Euro-Par, Vol. I 1996: 828-831

114 Amber Roy-Chowdhury, Prithviraj Banerjee: Compiler-Assisted Generation of Error-Detecting Parallel Programs. FTCS 1996: 360-369

113 EE Pradeep Prabhakaran, Prithviraj Banerjee: Parallel Algorithms for Force Directed Scheduling of Flattened and Hierarchical Signal Flow Graphs. ICCD 1996: 66-71

112 Gagan Hasteer, Prithviraj Banerjee: A Parallel Algorithm for State Assignment of Finite State Machines. ICPP, Vol. 2 1996: 37-45

111 Daniel J. Palermo, Ernesto Su, Eugene W. Hodges IV, Prithviraj Banerjee: Compiler Support for Privatization on Distributed-Memory Machines. ICPP, Vol. 3 1996: 17-24

110 EE Shankar Ramaswamy, Eugene W. Hodges IV, Prithviraj Banerjee: Compiling MATLAB Programs to ScaLAPACK: Exploiting Task and Data Parallelism. IPPS 1996: 613-619

109 John A. Chandy, Steven Parkes, Prithviraj Banerjee: Distributed Object Oriented Data Structures and Algorithms for VLSI CAD. IRREGULAR 1996: 147-158

108 EE Antonio Lain, Prithviraj Banerjee: Compiler Support for Hybrid Irregular Accesses on Multicomputers. International Conference on Supercomputing 1996: 1-9

107 Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee: Interprocedural Array Redistribution Data-Flow Analysis. LCPC 1996: 435-449

106 EE John A. Chandy, Prithviraj Banerjee: Parallel simulated annealing strategies for VLSI cell placement. VLSI Design 1996: 37-42

105 EE Venkatram Krishnaswamy, Prithviraj Banerjee: Actor Based Parallel VHDL Simulation Using Time Warp. Workshop on Parallel and Distributed Simulation 1996: 135-142

104 Amber Roy-Chowdhury, Prithviraj Banerjee: Algorithm-Based Fault Location and Recovery for Matrix Computations on Multiprocessor Systems. IEEE Trans. Computers 45(11): 1239-1247 (1996)

103 Amber Roy-Chowdhury, Prithviraj Banerjee: A New Error Analysis Based Method for Tolerance Computation for Algorithm-Based Checks. IEEE Trans. Computers 45(2): 238-243 (1996)

102 Amber Roy-Chowdhury, Nikolas Bellas, Prithviraj Banerjee: Algorithm-Based Error Detection Schemes for Iterative Solution of Partial Differential Equations. IEEE Trans. Computers 45(4): 394-407 (1996)

101 V. S. S. Nair, Jacob A. Abraham, Prithviraj Banerjee: Efficient Techniques for the Analysis of Algorithm-Based Fault Tolerance (ABFT) Schemes. IEEE Trans. Computers 45(4): 499-503 (1996)

100 Ky MacPherson, Prithviraj Banerjee: Parallel Algorithms for VLSI Layout Verification. J. Parallel Distrib. Comput. 36(2): 156-172 (1996)

99 Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee: Dynamic Data Partitioning for Distributed-Memory Multicomputers. J. Parallel Distrib. Comput. 38(2): 158-175 (1996)

98 Shankar Ramaswamy, Barbara Simons, Prithviraj Banerjee: Optimizations for Efficient Array Redistribution on Distributed Memory Multicomputers. J. Parallel Distrib. Comput. 38(2): 217-228 (1996)

1995

97 Michael Peercy, Prithviraj Banerjee: Software Schemes of Reconfiguration and Recovery in Distributed Memory Multicomputers Using the Actor Model. FTCS 1995: 479-488

96 EE Steven Parkes, Prithviraj Banerjee, Janak H. Patel: A parallel algorithm for fault simulation based on PROOFS . ICCD 1995: 616-

95 EE Kaushik De, John A. Chandy, Sumit Roy, Steven Parkes, Prithviraj Banerjee: Parallel algorithms for logic synthesis using the MIS approach. IPPS 1995: 579-585

94 EE Antonio Lain, Prithviraj Banerjee: Exploiting spatial regularity in irregular iterative applications. IPPS 1995: 820-826

93 EE Ernesto Su, Antonio Lain, Shankar Ramaswamy, Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee: Advanced Compilation Techniques in the PARADIGM Compiler for Distributed-memory Multicomputers. International Conference on Supercomputing 1995: 424-433

92 Daniel J. Palermo, Prithviraj Banerjee: Automatic Selection of Dynamic Data Partitioning Schemes for Distributed-Memory Multicomputers. LCPC 1995: 392-406

91 Prithviraj Banerjee, John A. Chandy, Manish Gupta, Eugene W. Hodges IV, John G. Holm, Antonio Lain, Daniel J. Palermo, Shankar Ramaswamy, Ernesto Su: The Paradigm Compiler for Distributed-Memory Multicomputers. IEEE Computer 28(10): 37-47 (1995)

90 EE Elizabeth M. Rudnick, Vivek Chickermane, Prithviraj Banerjee, Janak H. Patel: Sequential circuit testability enhancement using a nonscan approach. IEEE Trans. VLSI Syst. 3(2): 333-338 (1995)

89 Shankar Ramaswamy, Prithviraj Banerjee: Simultaneous Allocation and Scheduling Using Convex Programming Techniques. Parallel Processing Letters 5: 587-598 (1995)

1994

88 EE Steven Parkes, Prithviraj Banerjee, Janak H. Patel: ProperHITEC: A Portable, Parallel, Object-Oriented Approach to Sequential Test Generation. DAC 1994: 717-721

87 Amber Roy-Chowdhury, Prithviraj Banerjee: Algorithm-Based Fault Location and Recovery for Matrix Computations. FTCS 1994: 38-47

86 Daniel J. Palermo, Ernesto Su, John A. Chandy, Prithviraj Banerjee: Communication Optimizations Used in the PARADIGM Compiler for Distributed Memory Multicomputers. ICPP 1994: 1-10

85 Shankar Ramaswamy, Sachin S. Sapatnekar, Prithviraj Banerjee: A Convex Programming Approach for Exploiting Data and Functional Parallelism on Distributed Memory Multicomputers. ICPP 1994: 116-125

84 Kaushik De, Prithviraj Banerjee: Parallel Logic Synthesis Using Partitioning. ICPP (3) 1994: 135-142

83 Ernesto Su, Daniel J. Palermo, Prithviraj Banerjee: Processor Tagged Descriptors: A Data Structure for Compiling for Distributed-Memory Multicomputers. IFIP PACT 1994: 123-132

82 Sungho Kim, Prithviraj Banerjee, Balkrishna Ramkumar, Steven Parkes, John A. Chandy: ProperPLACE: A Portable Parallel Algorithm for Standard Cell Placement. IPPS 1994: 932-941

81 EE Antonio Lain, Prithviraj Banerjee: Techniques to overlap computation and communication in irregular iterative applications. International Conference on Supercomputing 1994: 236-245

80 EE Steven Parkes, John A. Chandy, Prithviraj Banerjee: A library-based approach to portable, parallel, object-oriented programming: interface, implementation, and application. SC 1994: 69-78

79 Prithviraj Banerjee, Michael Peercy: Design and Evaluation of Hardware Strategies for Reconfiguring Hypercubes and Meshes Under Faults. IEEE Trans. Computers 43(7): 841-848 (1994)

78 EE Kaushik De, Balkrishna Ramkumar, Prithviraj Banerjee: A portable parallel algorithm for logic synthesis using transduction. IEEE Trans. on CAD of Integrated Circuits and Systems 13(5): 566-580 (1994)

77 EE Balkrishna Ramkumar, Prithviraj Banerjee: ProperCAD: A portable object-oriented parallel environment for VLSI CAD. IEEE Trans. on CAD of Integrated Circuits and Systems 13(7): 829-842 (1994)

1993

76 EE Vivek Chickermane, Elizabeth M. Rudnick, Prithviraj Banerjee, Janak H. Patel: Non-Scan Design-for-Testability Techniques for Sequential Circuits. DAC 1993: 236-241

75 Amber Roy-Chowdhury, Prithviraj Banerjee: Tolerance Determination for Algorithm-Based Checks Using Simplified Error Analysis Techniques. FTCS 1993: 290-298

74 Amber Roy-Chowdhury, Prithviraj Banerjee: A Fault-Tolerant Parallel Algorithm for Iterative Solution of the Laplace Equation. ICPP 1993: 133-140

73 Shankar Ramaswamy, Prithviraj Banerjee: Processor Allocation and Scheduling of Macro Dataflow Graphs on Distributed Memory Multicomputers by the PARADIGM Compiler. ICPP 1993: 134-138

72 John A. Chandy, Prithviraj Banerjee: Reliability Evalutaion of Disk Array Architectures. ICPP 1993: 263-267

71 Ernesto Su, Daniel J. Palermo, Prithviraj Banerjee: Automating Parallelization of Regular Computations for Distributed-Memory. ICPP 1993: 30-38

70 Balkrishna Ramkumar, Prithviraj Banerjee: A Portable Parallel Algorithm for VLSI Circuit Extraction. IPPS 1993: 434-438

69 EE Manish Gupta, Prithviraj Banerjee: PARADIGM: A Compiler for Automatic Data Distribution on Multicomputers. International Conference on Supercomputing 1993: 87-96

68 Chieng-Fai Lim, Prithviraj Banerjee, Kaushik De, Saburo Muroga: A Shared Memory Parallel Algorithm for Logic Synthesis. VLSI Design 1993: 317-322

67 EE Krishna P. Belkhale, Randall J. Brouwer, Prithviraj Banerjee: Task scheduling for exploiting parallelism and hierarchy in VLSI CAD algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems 12(5): 557-567 (1993)

66 A. L. Narasimha Reddy, John A. Chandy, Prithviraj Banerjee: Design and Evaluation of Gracefully Degradable Disk Arrays. J. Parallel Distrib. Comput. 17(1-2): 28-40 (1993)

1992

65 EE Sungho Kim, Prithviraj Banerjee, Vivek Chickermane, Janak H. Patel: APT: An Area-Performance-Testability Driven Placement Algorithm. DAC 1992: 141-146

64 Michael Peercy, Prithviraj Banerjee: Design and Analysis of Software Reconfiguration Strategies for Hypercube Multicomputers under Multiple Faults. FTCS 1992: 448-455

63 EE Balkrishna Ramkumar, Prithviraj Banerjee: Portable parallel test generation for sequential circuits. ICCAD 1992: 220-223

62 EE Kaushik De, Balkrishna Ramkumar, Prithviraj Banerjee: ProperSYN: a portable parallel algorithm for logic synthesis. ICCAD 1992: 412-416

61 Balkrishna Ramkumar, Prithviraj Banerjee: ProperCAd: A Portable Object-Oriented Parallel Environment for VLSI CAD. ICCD 1992: 544-548

60 John G. Holm, Prithviraj Banerjee: Low Cost Concurrent Error Detection in a VLIW Architecture Using Replicated Instructions. ICPP (1) 1992: 192-195

59 EE Manish Gupta, Prithviraj Banerjee: A methodology for high-level synthesis of communication on multicomputers. ICS 1992: 357-367

58 Manish Gupta, Prithviraj Banerjee: Compile-Time Estimation of Communication Costs on Multicomputers. IPPS 1992: 470-475

57 Krishna P. Belkhale, Prithviraj Banerjee: Reconfiguration Strategies for VLSI Processor Arrays and Trees Using a Modified Diogenes Approach. IEEE Trans. Computers 41(1): 83-96 (1992)

56 Krishna P. Belkhale, Prithviraj Banerjee: Parallel Algorithms for Geometric Connected Component Labeling on a Hypercube Multiprocessor. IEEE Trans. Computers 41(6): 699-709 (1992)

55 EE Manish Gupta, Prithviraj Banerjee: Demonstration of Automatic Data Partitioning Techniques for Parallelizing Compilers on Multicomputers. IEEE Trans. Parallel Distrib. Syst. 3(2): 179-193 (1992)

54 EE Jiun-Ming Hsu, Prithviraj Banerjee: Performance Measurement and Trace Driven Simulation of Parallel CAD and Numeric Applications on a Hypercube Multicomputer. IEEE Trans. Parallel Distrib. Syst. 3(4): 451-464 (1992)

1991

53 EE Srinivas Patil, Prithviraj Banerjee, Janak H. Patel: Parallel Test Generation for Sequential Circuits on General-Purpose Multiprocessors. DAC 1991: 155-159

52 A. L. Narasimha Reddy, Prithviraj Banerjee: Gracefully Degradable Disk Arrays. FTCS 1991: 401-409

51 Vijay Balasubramanian, Prithviraj Banerjee: CRAFT: Compiler-Assisted Algorithm-Based Fault Tolerance in Distributed Memory Multiprocessors. ICPP (1) 1991: 501-504

50 Jiun-Ming Hsu, Prithviraj Banerjee: Performance Evaluation of Hardware Support for Message Passing in Distributed Memory Multicomputers. ICPP (1) 1991: 604-607

49 A. L. Narasimha Reddy, Prithviraj Banerjee, D. K. Chen: Compiler Support for Parallel I/O Operations. ICPP (2) 1991: 290-291

48 Krishna P. Belkhale, Prithviraj Banerjee: A Scheduling Algorithm for Parallelizable Dependent Tasks. IPPS 1991: 500-506

47 Sungho Kim, Prithviraj Banerjee, Srinivas Patil: A Layout Driven Design for Testability Technique for MOS VLSI Circuits. ITC 1991: 157-165

46 Kaushik De, Prithviraj Banerjee: Logic Partitioning and Resynthesis for Testability. ITC 1991: 906-915

45 EE Ralph-Michael Kling, Prithviraj Banerjee: Empirical and theoretical studies of the simulated evolution method applied to standard cell placement. IEEE Trans. on CAD of Integrated Circuits and Systems 10(10): 1303-1315 (1991)

44 EE Srinivas Patil, Prithviraj Banerjee: Performance trade-offs in a parallel test generation/fault simulation environment. IEEE Trans. on CAD of Integrated Circuits and Systems 10(12): 1542-1558 (1991)

43 EE Krishna P. Belkhale, Prithviraj Banerjee: Parallel algorithms for VLSI circuit extraction. IEEE Trans. on CAD of Integrated Circuits and Systems 10(5): 604-618 (1991)

1990

42 EE Ralph-Michael Kling, Prithviraj Banerjee: Optimization by Simulated Evolution with Applications to Standard Cell Placement. DAC 1990: 20-25

41 EE Randall J. Brouwer, Prithviraj Banerjee: PHIGURE: A Parallel Hierarchical Global Router. DAC 1990: 650-653

40 Krishna P. Belkhale, Prithviraj Banerjee: A Parallel Algorithm for Hierarchical Circuit Extraction. ICCAD 1990: 236-239

39 David Blaauw, Robert B. Mueller-Thuns, Daniel G. Saab, Prithviraj Banerjee, Jacob A. Abraham: SNEL: A Switch-Level Simulator Using Multiple Levels of Functional Abstraction. ICCAD 1990: 66-69

38 Jiun-Ming Hsu, Prithviraj Banerjee: Hardware Support for Message Routing in a Distributed Memory Multicomputer. ICPP (1) 1990: 508-515

37 Krishna P. Belkhale, Prithviraj Banerjee: An Approximate Algorithm for the Partitionable Independent Task Scheduling Problem. ICPP (1) 1990: 72-75

36 Krishna P. Belkhale, Prithviraj Banerjee: Geometric Connected Component Labeling on Distributed Memory Multicomputers. ICPP (3) 1990: 291-294

35 Jiun-Ming Hsu, Prithviraj Banerjee: Performance Measurement and Trace Driven Simulation of Parallel CAD and Numeric Applications on a Hypercube Multicomputer. ISCA 1990: 260-269

34 A. L. Narasimha Reddy, Prithviraj Banerjee: A Study of I/O Behavior of Perfect Benchmarks on a Multiprocessor. ISCA 1990: 312-321

33 EE Jiun-Ming Hsu, Prithviraj Banerjee: A message passing coprocessor for distributed memory multicomputers. SC 1990: 720-729

32 A. L. Narasimha Reddy, Prithviraj Banerjee: Algorithms-Based Fault Detection for Signal Processing Applications. IEEE Trans. Computers 39(10): 1304-1308 (1990)

31 Vijay Balasubramanian, Prithviraj Banerjee: Compiler-Assisted Synthesis of Algorithm-Based Checking in Multiprocessors. IEEE Trans. Computers 39(4): 436-446 (1990)

30 Prithviraj Banerjee, Joseph T. Rahmeh, Craig B. Stunkel, V. S. S. Nair, Kaushik Roy, Vijay Balasubramanian, Jacob A. Abraham: Algorithm-Based Fault Tolerance on a Hypercube Multiprocessor. IEEE Trans. Computers 39(9): 1132-1145 (1990)

29 EE Prithviraj Banerjee, Mark Howard Jones, Jeff S. Sargent: Parallel Simulated Annealing Algorithms for Cell Placement on Hypercube Multiprocessors. IEEE Trans. Parallel Distrib. Syst. 1(1): 91-106 (1990)

28 EE A. L. Narasimha Reddy, Prithviraj Banerjee: Design, Analysis, and Simulation of I/O Architectures for Hypercube. IEEE Trans. Parallel Distrib. Syst. 1(2): 140-151 (1990)

27 EE Vijay Balasubramanian, Prithviraj Banerjee: Tradeoffs in the Design of Efficient Algorithm-Based Error Detection Schemes for Hypercube Multiprocessors. IEEE Trans. Software Eng. 16(2): 183-196 (1990)

26 EE Srinivas Patil, Prithviraj Banerjee: A parallel branch and bound algorithm for test generation. IEEE Trans. on CAD of Integrated Circuits and Systems 9(3): 313-322 (1990)

1989

25 EE Srinivas Patil, Prithviraj Banerjee: A Parallel Branch and Bound Algorithm for Test Generation. DAC 1989: 339-343

24 EE Jeff S. Sargent, Prithviraj Banerjee: A Parallel Row-based Algorithm for Standard Cell Placement with Integrated Error Control. DAC 1989: 590-593

23 A. L. Narasimha Reddy, Prithviraj Banerjee: Performance Evaluation of Multiple-Disk I/O Systems. ICPP (1) 1989: 315-318

22 Robert B. Mueller-Thuns, David McFarland, Prithviraj Banerjee: Algorithm-Based Fault Tolerance for Adaptive Least Squares Lattice Filtering on a Hypercube Multiprocessor. ICPP (3) 1989: 177-180

21 EE A. L. Narasimha Reddy, Prithviraj Banerjee: I/O issues for hypercubes. ICS 1989: 72-81

20 Vijay Balasubramanian, Prithviraj Banerjee: Algorithm-based Error Detection for Signal Processing Applications on a Hypercube Multiprocessor. IEEE Real-Time Systems Symposium 1989: 134-143

19 Srinivas Patil, Prithviraj Banerjee: Fault Partitioning Issues in an Integrated Parallel Test Generation/Fault Simulation Environment. ITC 1989: 718-726

18 Prithviraj Banerjee, Abhijeet Dugar: The Design, Analysis and Simulation of a Fault-Tolerant Interconnection Network Supporting the Fetch-and-Add Primitive. IEEE Trans. Computers 38(1): 30-46 (1989)

17 A. L. Narasimha Reddy, Prithviraj Banerjee: An Evaluation of Multiple-Disk I/O Systems. IEEE Trans. Computers 38(12): 1680-1690 (1989)

16 EE Ralph-Michael Kling, Prithviraj Banerjee: ESp: Placement by simulated evolution. IEEE Trans. on CAD of Integrated Circuits and Systems 8(3): 245-256 (1989)

1988

15 A. L. Narasimha Reddy, Prithviraj Banerjee: I/O Embedding in Hypercubes. ICPP (1) 1988: 331-338

14 Prithviraj Banerjee: The Cubical Ring Connected Cycles: A Fault-Tolerant Parallel Computation Network. IEEE Trans. Computers 37(5): 632-636 (1988)

13 Douglas B. West, Prithviraj Banerjee: On the Construction of Communication Networks Satisfying Bounded Fan-In of Service Ports. IEEE Trans. Computers 37(9): 1148-1151 (1988)

1987

12 EE Ralph-Michael Kling, Prithviraj Banerjee: ESP: A New Standard Cell Placement Package Using Simulated Evolution. DAC 1987: 60-66

11 EE M. Jones, Prithviraj Banerjee: Performance of a Parallel Algorithm for Standard Cell Placement on the Intel Hypercube. DAC 1987: 807-813

10 EE A. L. Narasimha Reddy, Prithviraj Banerjee: A Fault Secure Dictionary Machine. ICDE 1987: 104-110

9 Vijay Balasubramanian, Prithviraj Banerjee: A Fixed Size Array Processor for Computing the Fast Fourier Transform. IEEE Real-Time Systems Symposium 1987: 36-43

8 Vijay Balasubramanian, Prithviraj Banerjee: A Fault Tolerant Massively Parallel Processing Architecture. J. Parallel Distrib. Comput. 4(4): 363-383 (1987)

1986

7 Prithviraj Banerjee, Abhijeet Dugar: A Fault-Tolerant Interconnection Network Supporting the Fetch-And-Add Primitive. ICPP 1986: 327-334

6 Vijay Balasubramanian, Prithviraj Banerjee: RECBAR : A Reconfigurable Massively Parallel Processing Architecture. ICPP 1986: 390-393

5 Prithviraj Banerjee, Jacob A. Abraham: A Probabilistic Model of Algorithm-Based Fault Tolerance in Array Processors for Real-Time Systems. IEEE Real-Time Systems Symposium 1986: 72-78

4 Prithviraj Banerjee, Jacob A. Abraham: Bounds on Algorithm-Based Fault Tolerance in Multiple Processor Systems. IEEE Trans. Computers 35(4): 296-306 (1986)

1985

3 EE Prithviraj Banerjee, Jacob A. Abraham: A Multivalued Algebra For Modeling Physical Failures in MOS VLSI Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 4(3): 312-321 (1985)

1984

2 Prithviraj Banerjee, Jacob A. Abraham: Fault-Secure Algorithms for Multiple-Processor Systems. ISCA 1984: 279-287

1983

1 Prithviraj Banerjee, Jacob A. Abraham: Generating Tests for Physical Failures in MOS Logic Circuits. ITC 1983: 554-559

2009
247	EE	Gaurav Mittal, David Zaretsky, Prithviraj Banerjee: Streaming implementation of a sequential decompression algorithm on an FPGA. FPGA 2009: 283
246	EE	Prith Banerjee: An intelligent IT infrastructure for the future. HPCA 2009: 3-4
245	EE	Lei Gao, David Zaretsky, Gaurav Mittal, Dan Schonfeld, Prith Banerjee: A software pipelining algorithm in high-level synthesis for FPGA architectures. ISQED 2009: 297-302
2008
244	EE	Nikolaos D. Liveris, Hai Zhou, Prithviraj Banerjee: A dynamic-programming algorithm for reducing the energy consumption of pipelined System-Level streaming applications. ASP-DAC 2008: 42-48
243	EE	Nikolaos D. Liveris, Hai Zhou, Robert P. Dick, Prithviraj Banerjee: State space abstraction for parameterized self-stabilizing embedded systems. EMSOFT 2008: 11-20
2007
242	EE	Nikolaos D. Liveris, Chuan Lin, J. Wang, Hai Zhou, Prithviraj Banerjee: Retiming for Synchronous Data Flow Graphs. ASP-DAC 2007: 480-485
241	EE	David Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee: Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs. ISQED 2007: 595-601
240	EE	Gaurav Mittal, David Zaretsky, Xiaoyong Tang, Prithviraj Banerjee: An Overview of a Compiler for Mapping Software Binaries to Hardware. IEEE Trans. VLSI Syst. 15(11): 1177-1190 (2007)
239	EE	Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou: Low-Power Optimization by Smart Bit-Width Allocation in a SystemC-Based ASIC Design Environment. IEEE Trans. on CAD of Integrated Circuits and Systems 26(3): 447-455 (2007)
238	EE	Pramod G. Joisha, Prithviraj Banerjee: A translator system for the MATLAB language. Softw., Pract. Exper. 37(5): 535-578 (2007)
2006
237	EE	Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou: Smart bit-width allocation for low power optimization in a systemc based ASIC design environment. DATE 2006: 618-623
236	EE	David Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee: Dynamic Template Generation for Resource Sharing in Control and Data Flow Graphs. VLSI Design 2006: 465-468
235	EE	Pramod G. Joisha, Prithviraj Banerjee: An algebraic array shape inference system for MATLAB. ACM Trans. Program. Lang. Syst. 28(5): 848-907 (2006)
2005
234	EE	Gaurav Mittal, David Zaretsky, Gokhan Memik, Prith Banerjee: Automatic extraction of function bodies from software binaries. ASP-DAC 2005: 928-931
233	EE	Nikolaos D. Liveris, Hai Zhou, Prithviraj Banerjee: An Efficient System-Level to RTL Verification Framework for Computation-Intensive Applications. Asian Test Symposium 2005: 28-33
232	EE	Xiaoyong Tang, Hai Zhou, Prithviraj Banerjee: Leakage power optimization with dual-V_th library in high-level synthesis. DAC 2005: 202-207
231	EE	David Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee: Generation of Control and Data Flow Graphs from Scheduled and Pipelined Assembly Code. LCPC 2005: 76-90
230	EE	Xiaoyong Tang, Tianyi Jiang, Alex K. Jones, Prithviraj Banerjee: Behavioral Synthesis of Data-Dominated Circuits for Minimal Energy Implementation. VLSI Design 2005: 267-273
229	EE	Sanghamitra Roy, Prith Banerjee: An Algorithm for Trading Off Quantization Error with Hardware Resources for MATLAB-Based FPGA Design. IEEE Trans. Computers 54(7): 886-896 (2005)
228	EE	Xiaoyong Tang, Tianyi Jiang, Alex K. Jones, Prithviraj Banerjee: High-Level Synthesis for Low Power Hardware Implementation of Unscheduled Data-Dominated Circuits. J. Low Power Electronics 1(3): 259-272 (2005)
2004
227	EE	Tianyi Jiang, Xiaoyong Tang, Prithviraj Banerjee: Macro-models for high level area and power estimation on FPGAs. ACM Great Lakes Symposium on VLSI 2004: 162-165
226	EE	David Zaretsky, Gaurav Mittal, Xiaoyong Tang, Prithviraj Banerjee: Evaluation of scheduling and allocation algorithms while mapping assembly code onto FPGAs. ACM Great Lakes Symposium on VLSI 2004: 397-400
225	EE	Gaurav Mittal, David Zaretsky, Xiaoyong Tang, Prithviraj Banerjee: Automatic translation of software binaries onto FPGAs. DAC 2004: 389-394
224	EE	Sanghamitra Roy, Prithviraj Banerjee: An algorithm for converting floating-point computations to fixed-point in MATLAB based FPGA design. DAC 2004: 484-487
223	EE	Nikolaos D. Liveris, Prithviraj Banerjee: Power Aware Interface Synthesis for Bus-Based SoC Design. DATE 2004: 864-869
222	EE	David Zaretsky, Gaurav Mittal, Xiaoyong Tang, Prithviraj Banerjee: Overview of the FREEDOM Compiler for Mapping DSP Software to FPGAs. FCCM 2004: 37-46
221	EE	Tianyi Jiang, Xiaoyong Tang, Prithviraj Banerjee: High level area, delay and power estimation for FPGAs. FPGA 2004: 249
220	EE	Sanghamitra Roy, Debjit Sinha, Prithviraj Banerjee: An algorithm for trading off quantization error with hardware resources for MATLAB based FPGA design. FPGA 2004: 256
219	EE	Rajarshi Mukherjee, Alex K. Jones, Prithviraj Banerjee: Handling Data Streams while Compiling C Programs onto Hardware. ISVLSI 2004: 271-272
218		Prithviraj Banerjee, Malay Haldar, Anshuman Nayak, Victor Kim, Vikram Saxena, Steven Parkes, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, David Zaretsky, R. Anderson, J. R. Uribe: Overview of a compiler for synthesizing MATLAB programs onto FPGAs. IEEE Trans. VLSI Syst. 12(3): 312-324 (2004)
2003
217	EE	Pramod G. Joisha, Prithviraj Banerjee: The MAGICA Type Inference Engine for MATLAB. CC 2003: 121-125
216	EE	Prithviraj Banerjee, Debabrata Bagchi, Malay Haldar, Anshuman Nayak, Victor Kim, R. Uribe: Automatic Conversion of Floating Point MATLAB Programs into Fixed Point FPGA Based Hardware Design. FCCM 2003: 263-264
215	EE	Alex K. Jones, Prithviraj Banerjee: An Automated and Power-Aware Framework for Utilization of IP Cores in Hardware Generated from C Descriptions Targeting FPGAs. FCCM 2003: 284-285
214	EE	Prithviraj Banerjee, Vikram Saxena, J. R. Uribe, Malay Haldar, Anshuman Nayak, Victor Kim, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, R. Anderson: Making area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs. FPGA 2003: 237
213	EE	Alex K. Jones, Prithviraj Banerjee: An automated and power-aware framework for utilization of IP cores in hardware generated from C descriptions targeting FPGAs. FPGA 2003: 244
212	EE	Pramod G. Joisha, Prithviraj Banerjee: Static array storage optimization in MATLAB. PLDI 2003: 258-268
211	EE	Amitabh Mishra, Prithviraj Banerjee: An Algorithm-Based Error Detection Scheme for the Multigrid Method. IEEE Trans. Computers 52(9): 1089-1099 (2003)
210	EE	Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee: Reducing False Sharing and Improving Spatial Locality in a Unified Compilation Framework. IEEE Trans. Parallel Distrib. Syst. 14(4): 337-354 (2003)
2002
209	EE	Alex K. Jones, Debabrata Bagchi, Satrajit Pal, Xiaoyong Tang, Alok N. Choudhary, Prithviraj Banerjee: PACT HDL: a C compiler targeting ASICs and FPGAs with power and performance optimizations. CASES 2002: 188-197
208	EE	Anshuman Nayak, Malay Haldar, Alok N. Choudhary, Prithviraj Banerjee: Accurate Area and Delay Estimators for FPGAs. DATE 2002: 862-869
207	EE	Prithviraj Banerjee, Malay Haldar, Anshuman Nayak, Victor Kim, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi: A Behavioral Synthesis Tool for Exploiting Fine Grain Parallelism in FPGAs. IWDC 2002: 246-256
206	EE	Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee: Automatic Parallelization of Compiled Event Driven VHDL Simulation. IEEE Trans. Computers 51(4): 380-394 (2002)
2001
205	EE	Pramod G. Joisha, Prithviraj Banerjee: Correctly detecting intrinsic type errors in typeless languages such as MATLAB. APL 2001: 7-21
204	EE	Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee: Automated synthesis of pipelined designs on FPGAs for signal and image processing applications described in MATLAB. ASP-DAC 2001: 645-648
203	EE	Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee: Compiler Optimization of Dynamic Data Distributions for Distributed-Memory Multicomputers. Compiler Optimizations for Scalable Parallel Systems Languages 2001: 445-484
202	EE	Anshuman Nayak, Malay Haldar, Alok N. Choudhary, Prithviraj Banerjee: Precision and error analysis of MATLAB applications during automated hardware synthesis for FPGAs. DATE 2001: 722-728
201	EE	Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee: A System for Synthesizing Optimized FPGA Hardware from MATLAB. ICCAD 2001: 314-319
200	EE	Dhruva R. Chakrabarti, Prithviraj Banerjee: Global optimization techniques for automatic parallelization of hybrid applications. ICS 2001: 166-180
199	EE	Pramod G. Joisha, U. Nagaraj Shenoy, Prithviraj Banerjee: Computing Array Shapes in MATLAB. LCPC 2001: 395-410
198	EE	Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee, U. Nagaraj Shenoy: Fpga Hardware Synthesis From Matlab. VLSI Design 2001: 299-304
197	EE	U. Nagaraj Shenoy, Prithviraj Banerjee, Alok N. Choudhary, Mahmut T. Kandemir: Efficient Synthesis of Array Intensive Computations onto FPGA Based Accelerators. VLSI Design 2001: 305-310
196	EE	Pramod G. Joisha, Abhay Kanhere, Prithviraj Banerjee, U. Nagaraj Shenoy, Alok N. Choudhary: Handling context-sensitive syntactic issues in the design of a front-end for a MATLAB compiler. ACM SIGAPL APL Quote Quad 31(3): 27-40 (2001)
195	EE	U. Nagaraj Shenoy, Alok N. Choudhary, Prithviraj Banerjee: An algorithm for synthesis of large time-constrained heterogeneous adaptive systems. ACM Trans. Design Autom. Electr. Syst. 6(2): 207-225 (2001)
194	EE	Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary, Prithviraj Banerjee: A Layout-Conscious Iteration Space Transformation Technique. IEEE Trans. Computers 50(12): 1321-1336 (2001)
193	EE	Pramod G. Joisha, Prithviraj Banerjee: The Efficient Computation of Ownership Sets in HPF. IEEE Trans. Parallel Distrib. Syst. 12(8): 769-788 (2001)
192	EE	Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Eduard Ayguadé: Static and Dynamic Locality Optimizations Using Integer Linear Programming. IEEE Trans. Parallel Distrib. Syst. 12(9): 922-941 (2001)
191		Dhruva R. Chakrabarti, Prithviraj Banerjee: Static Single Assignment Form for Message-Passing Programs. International Journal of Parallel Programming 29(2): 139-184 (2001)
190	EE	Yanhong Yuan, Prithviraj Banerjee: A Parallel Implementation of a Fast Multipole-Based 3-D Capacitance Extraction Program on Distributed Memory Multicomputers. J. Parallel Distrib. Comput. 61(12): 1751-1774 (2001)
2000
189		Majid Sarrafzadeh, Prithviraj Banerjee, Kaushik Roy: Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, Chicago, Illinois, USA, March 2-4, 2000 ACM 2000
188	EE	Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee: Parallel algorithms for FPGA placement. ACM Great Lakes Symposium on VLSI 2000: 86-94
187	EE	Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee: Scheduling algorithms for automated synthesis of pipelined designs on FPGAs for applications described in MATLAB. CASES 2000: 85-93
186	EE	U. Nagaraj Shenoy, Prithviraj Banerjee, Alok N. Choudhary: A System-Level Synthesis Algorithm with Guaranteed Solution Quality. DATE 2000: 417-
185	EE	Prithviraj Banerjee, U. Nagaraj Shenoy, Alok N. Choudhary, Scott Hauck, C. Bachmann, Malay Haldar, Pramod G. Joisha, Alex K. Jones, Abhay Kanhere, Anshuman Nayak, S. Periyacheri, M. Walkden, David Zaretsky: A MATLAB Compiler for Distributed, Heterogeneous, Reconfigurable Computing Systems. FCCM 2000: 39-48
184	EE	Zhi Alex Ye, U. Nagaraj Shenoy, Prithviraj Banerjee: A C compiler for a processor with a reconfigurable functional unit. FPGA 2000: 95-100
183	EE	Yanhong Yuan, Prithviraj Banerjee: Comparative Study of Parallel Algorithms for 3-D Capacitance Extraction on Distributed Memory Multiprocessors. ICCD 2000: 133-
182	EE	Malay Haldar, Anshuman Nayak, Abhay Kanhere, Pramod G. Joisha, U. Nagaraj Shenoy, Alok N. Choudhary, Prithviraj Banerjee: Match Virtual Machine: An Adaptive Runtime System to Execute MATLAB in Parallel. ICPP 2000: 145-152
181	EE	Victor Kim, Prithviraj Banerjee, Kaushik De: Fine-Grained Parallel VLSI Synthesis for Commercial CAD on a Network of Workstations. ICPP 2000: 421-
180	EE	Yanhong Yuan, Prithviraj Banerjee: A Parallel Implementation of a Fast Multipole Based 3-D Capacitance Extraction Program on Distributed Memory Multicomputer. IPDPS 2000: 323-330
179	EE	Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithviraj Banerjee: CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit. ISCA 2000: 225-235
178	EE	Pramod G. Joisha, Prithviraj Banerjee: Exploiting Ownership Sets in HPF. LCPC 2000: 259-273
177	EE	Pramod G. Joisha, Prithviraj Banerjee: Correctly detecting intrinsic type errors in typeless languages such as MATLAB. ACM SIGAPL APL Quote Quad 31(2): 7-21 (2000)
176	EE	Mahmut T. Kandemir, Alok N. Choudhary, Prithviraj Banerjee, J. Ramanujam, U. Nagaraj Shenoy: Minimizing Data and Synchronization Costs in One-Way Communication. IEEE Trans. Parallel Distrib. Syst. 11(12): 1232-1251 (2000)
175	EE	Antonio Lain, Dhruva R. Chakrabarti, Prithviraj Banerjee: Compiler and Run-Time Support for Exploiting Regularity within Irregular Applications. IEEE Trans. Parallel Distrib. Syst. 11(2): 119-135 (2000)
1999
174		Prithviraj Banerjee, Viktor K. Prasanna, Bhabani P. Sinha: High Performance Computing - HiPC'99, 6th International Conference, Calcutta, India, December 17-20, 1999, Proceedings Springer 1999
173	EE	Sumit Roy, Krishna P. Belkhale, Prithviraj Banerjee: An Approxmimate Algorithm for Delay-Constraint Technology Mapping. DAC 1999: 367-372
172	EE	Amitabh Mishra, Prithviraj Banerjee: An Algorithm Based Error Detection Scheme for the Multigrid Algorithm. FTCS 1999: 12-19
171	EE	Jim E. Crenshaw, Majid Sarrafzadeh, Prithviraj Banerjee, Pradeep Prabhakaran: An Incremental Floorplanner. Great Lakes Symposium on VLSI 1999: 248-251
170	EE	Yanhong Yuan, Prithviraj Banerjee: ICE: Incremental 3-Dimensional Capacitance and Resistance Extraction for an Iterative Design Environment. Great Lakes Symposium on VLSI 1999: 64-67
169		Yanhong Yuan, Prithviraj Banerjee: A Parallel 3-D Capacitance Extraction Program. HiPC 1999: 202-206
168	EE	Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee: A Framework for Interprocedural Locality Optimization Using Both Loop and Data Layout Transformations. ICPP 1999: 95-102
167	EE	Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee: On Reducing False Sharing while Improving Locality on Shared Memory Multiprocessors. IEEE PACT 1999: 203-211
166	EE	Dhruva R. Chakrabarti, Prithviraj Banerjee: A Novel Compilation Framework for Supporting Semi-Regular Distributions in Hybrid Applications. IPPS/SPDP 1999: 597-602
165	EE	Pramod G. Joisha, Prithviraj Banerjee: PARADIGM (version 2.0): A New HPF Compilation System. IPPS/SPDP 1999: 609-615
164	EE	Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee: A Graph Based Framework to Detect Optimal Memory Layouts for Improving Data Locality. IPPS/SPDP 1999: 738-743
163	EE	Yanhong Yuan, Prithviraj Banerjee: Incremental capacitance extraction and its application to iterative timing-driven detailed routing. ISPD 1999: 42-47
162	EE	Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Eduard Ayguadé: An integer linear programming approach for optimizing cache locality. International Conference on Supercomputing 1999: 500-509
161	EE	Dhruva R. Chakrabarti, Prithviraj Banerjee: Accurate Data and Context Management in Message-Passing Programs. LCPC 1999: 117-132
160		Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee: Improving Locality Using a Graph-Based Technique for Detecting Memory Layouts of Arrays. PPSC 1999
159	EE	Pradeep Prabhakaran, Prithviraj Banerjee, Jim E. Crenshaw, Majid Sarrafzadeh: Simultaneous Scheduling, Binding and Floorplanning for Interconnect Power Optimization. VLSI Design 1999: 423-427
158	EE	Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, U. Nagaraj Shenoy: A global communication optimization technique based on data-flow analysis and linear algebra. ACM Trans. Program. Lang. Syst. 21(6): 1251-1297 (1999)
157		Pradeep Prabhakaran, Prithviraj Banerjee: Parallel Algorithms for Force Directed Scheduling of Flattened and Hierarchical Signal Flow Graphs. IEEE Trans. Computers 48(7): 762-768 (1999)
156	EE	Mahmut T. Kandemir, Alok N. Choudhary, U. Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam: A Linear Algebra Framework for Automatic Determination of Optimal Data Layouts. IEEE Trans. Parallel Distrib. Syst. 10(2): 115-135 (1999)
155		John A. Chandy, Prithviraj Banerjee: A Parallel Circuit-Partitioned Algorithm for Timing-Driven Standard Cell Placement. J. Parallel Distrib. Comput. 57(1): 64-90 (1999)
154		Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee: A Matrix-Based Approach to Global Locality Optimization. J. Parallel Distrib. Comput. 58(2): 190-235 (1999)
1998
153	EE	Maogang Wang, Prithviraj Banerjee, Majid Sarrafzadeh: Potential-NRG: Placement with Incomplete Data. DAC 1998: 279-282
152	EE	Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee: An Implicit Algorithm for Finding Steady States and its Application to FSM Verification. DAC 1998: 611-614
151	EE	Victor Kim, Prithviraj Banerjee: Parallel Algorithms for Power Estimation. DAC 1998: 672-677
150	EE	Sumit Roy, Harm Arts, Prithviraj Banerjee: PowerShake: A Low Power Driven Clustering and Factoring Methodology for Boolean Expressions. DATE 1998: 967-968
149	EE	Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, U. Nagaraj Shenoy, Prithviraj Banerjee: Enhancing Spatial Locality via Data Layout Optimizations. Euro-Par 1998: 422-434
148	EE	Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee: Efficient equivalence checking of multi-phase designs using retiming. ICCAD 1998: 557-562
147	EE	Sumit Roy, Harm Arts, Prithviraj Banerjee: PowerDrive: a fast, canonical POWER estimator for DRIVing synthEsis. ICCAD 1998: 601-606
146	EE	Mahmut T. Kandemir, U. Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam, Alok N. Choudhary: Minimizing Data and Synchronization Costs in One-Way Communication. ICPP 1998: 180-188
145	EE	Zhaoyun Xing, Prithviraj Banerjee: A Parallel Algorithm for Timing-driven Global Routing for Standard Cells. ICPP 1998: 54-61
144	EE	Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee: A Matrix-Based Approach to the Global Locality Optimization Problem. IEEE PACT 1998: 306-313
143	EE	Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, U. Nagaraj Shenoy: A Generalized Framework for Global Communication Optimization. IPPS/SPDP 1998: 69-73
142	EE	Dhruva R. Chakrabarti, Prithviraj Banerjee, Antonio Lain: Evaluation of Compiler and Runtime Library Approaches for Supporting Parallel Regular Applications. IPPS/SPDP 1998: 74-79
141	EE	Zhaoyun Xing, Prithviraj Banerjee: A parallel algorithm for zero skew clock tree routing. ISPD 1998: 118-123
140	EE	Venkatram Krishnaswamy, Prithviraj Banerjee: Parallel Compiled Event Driven VHDL Simulation. International Conference on Supercomputing 1998: 297-304
139	EE	Dhruva R. Chakrabarti, U. Nagaraj Shenoy, Alok N. Choudhary, Prithviraj Banerjee: An Efficient Uniform Run-time Scheme for Mixed Regular-irregular Applications. International Conference on Supercomputing 1998: 61-68
138	EE	Mahmut T. Kandemir, Alok N. Choudhary, U. Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam: A Hyperplane Based Approach for Optimizing Spatial Locality in Loop Nests. International Conference on Supercomputing 1998: 69-76
137	EE	Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary, Prithviraj Banerjee: A Loop Transformation Algorithm Based on Explicit Data Layout Representation for Optimizing Locality. LCPC 1998: 34-50
136	EE	Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee: Improving Locality Using Loop and Data Transformations in an Integrated Framework. MICRO 1998: 285-297
135	EE	Sumit Roy, Prithviraj Banerjee, Majid Sarrafzadeh: Partitioning sequential circuits for low power. VLSI Design 1998: 212-217
134	EE	Pradeep Prabhakaran, Prithviraj Banerjee: Simultaneous Scheduling, Binding and Floorplanning in High-level Synthesis. VLSI Design 1998: 428-434
133	EE	Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee: Efficient equivalence checking of multi-phase designs using phase abstraction and retiming. ACM Trans. Design Autom. Electr. Syst. 3(4): 600-625 (1998)
132		Gagan Hasteer, Prithviraj Banerjee: A Parallel Algorithm for State Assignment of Finite State Machines. IEEE Trans. Computers 47(2): 242-246 (1998)
1997
131	EE	Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee: An Efficient Assertion Checker for Combinational Properties. DAC 1997: 734-739
130	EE	John G. Holm, Steven Parkes, Prithviraj Banerjee: Performance Evaluation of a C++ Library Based Multithreaded System. HICSS (1) 1997: 282-291
129		John A. Chandy, Prithviraj Banerjee: A Parallel Circuit-Partitioned Algorithm for Timing Driven Cell Placement. ICCD 1997: 621-627
128	EE	Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee: Load Balancing and Workload Minimization Of Overlapping Parallel Tasks. ICPP 1997: 272-279
127	EE	Dilip Krishnaswamy, Prithviraj Banerjee: Exploiting task and data parallelism in parallel Hough and Radon transforms. ICPP 1997: 441-
126	EE	Zhaoyun Xing, John A. Chandy, Prithviraj Banerjee: Parallel Global Routing Algorithms for Standard Cells. IPPS 1997: 527-
125	EE	Sumit Roy, Prithviraj Banerjee: A Comparison of Parallel Approaches for Algebraic Factorization in Logic Synthesis. IPPS 1997: 665-671
124	EE	John G. Holm, John A. Chandy, Steven Parkes, Sumit Roy, Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee: Performance Evaluation of Message-Driven Parallel VLSI CAD Applications on General Purpose Multiprocessors. International Conference on Supercomputing 1997: 172-179
123	EE	Dilip Krishnaswamy, Michael S. Hsiao, Vikram Saxena, Elizabeth M. Rudnick, Janak H. Patel, Prithviraj Banerjee: Parallel Genetic Algorithms for Simulation-Based Sequential Circuit Test Generation. VLSI Design 1997: 475-481
122	EE	Gagan Hasteer, Prithviraj Banerjee: Simulated Annealing Based Parallel State Assignment of Finite State Machines. VLSI Design 1997: 69-75
121	EE	Dilip Krishnaswamy, Elizabeth M. Rudnick, Janak H. Patel, Prithviraj Banerjee: SPITFIRE: scalable parallel algorithms for test set partitioned fault simulation. VTS 1997: 274-281
120	EE	Dilip Krishnaswamy, Prithviraj Banerjee, Elizabeth M. Rudnick, Janak H. Patel: Asynchronous Parallel Algorithms for Test Set Partitioned Fault Simulation. Workshop on Parallel and Distributed Simulation 1997: 30-37
119	EE	Shankar Ramaswamy, Sachin S. Sapatnekar, Prithviraj Banerjee: A Framework for Exploiting Task and Data Parallelism on Distributed Memory Multicomputers. IEEE Trans. Parallel Distrib. Syst. 8(11): 1098-1116 (1997)
118	EE	John A. Chandy, Sungho Kim, Balkrishna Ramkumar, Steven Parkes, Prithviraj Banerjee: An evaluation of parallel simulated annealing strategies with application to standard cell placement. IEEE Trans. on CAD of Integrated Circuits and Systems 16(4): 398-410 (1997)
117	EE	Balkrishna Ramkumar, Prithviraj Banerjee: ProperTEST: a portable parallel test generator for sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 16(5): 555-569 (1997)
116		Gagan Hasteer, Prithviraj Banerjee: Simulated Annealing Based Parallel State Assignment of Finite State Machines. J. Parallel Distrib. Comput. 43(1): 21-35 (1997)
1996
115		Vamsi Boppana, Prashant Saxena, Prithviraj Banerjee, W. Kent Fuchs, C. L. Liu: A Parallel Algorithm for the Technology Mapping of LUT-Based FPGAs. Euro-Par, Vol. I 1996: 828-831
114		Amber Roy-Chowdhury, Prithviraj Banerjee: Compiler-Assisted Generation of Error-Detecting Parallel Programs. FTCS 1996: 360-369
113	EE	Pradeep Prabhakaran, Prithviraj Banerjee: Parallel Algorithms for Force Directed Scheduling of Flattened and Hierarchical Signal Flow Graphs. ICCD 1996: 66-71
112		Gagan Hasteer, Prithviraj Banerjee: A Parallel Algorithm for State Assignment of Finite State Machines. ICPP, Vol. 2 1996: 37-45
111		Daniel J. Palermo, Ernesto Su, Eugene W. Hodges IV, Prithviraj Banerjee: Compiler Support for Privatization on Distributed-Memory Machines. ICPP, Vol. 3 1996: 17-24
110	EE	Shankar Ramaswamy, Eugene W. Hodges IV, Prithviraj Banerjee: Compiling MATLAB Programs to ScaLAPACK: Exploiting Task and Data Parallelism. IPPS 1996: 613-619
109		John A. Chandy, Steven Parkes, Prithviraj Banerjee: Distributed Object Oriented Data Structures and Algorithms for VLSI CAD. IRREGULAR 1996: 147-158
108	EE	Antonio Lain, Prithviraj Banerjee: Compiler Support for Hybrid Irregular Accesses on Multicomputers. International Conference on Supercomputing 1996: 1-9
107		Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee: Interprocedural Array Redistribution Data-Flow Analysis. LCPC 1996: 435-449
106	EE	John A. Chandy, Prithviraj Banerjee: Parallel simulated annealing strategies for VLSI cell placement. VLSI Design 1996: 37-42
105	EE	Venkatram Krishnaswamy, Prithviraj Banerjee: Actor Based Parallel VHDL Simulation Using Time Warp. Workshop on Parallel and Distributed Simulation 1996: 135-142
104		Amber Roy-Chowdhury, Prithviraj Banerjee: Algorithm-Based Fault Location and Recovery for Matrix Computations on Multiprocessor Systems. IEEE Trans. Computers 45(11): 1239-1247 (1996)
103		Amber Roy-Chowdhury, Prithviraj Banerjee: A New Error Analysis Based Method for Tolerance Computation for Algorithm-Based Checks. IEEE Trans. Computers 45(2): 238-243 (1996)
102		Amber Roy-Chowdhury, Nikolas Bellas, Prithviraj Banerjee: Algorithm-Based Error Detection Schemes for Iterative Solution of Partial Differential Equations. IEEE Trans. Computers 45(4): 394-407 (1996)
101		V. S. S. Nair, Jacob A. Abraham, Prithviraj Banerjee: Efficient Techniques for the Analysis of Algorithm-Based Fault Tolerance (ABFT) Schemes. IEEE Trans. Computers 45(4): 499-503 (1996)
100		Ky MacPherson, Prithviraj Banerjee: Parallel Algorithms for VLSI Layout Verification. J. Parallel Distrib. Comput. 36(2): 156-172 (1996)
99		Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee: Dynamic Data Partitioning for Distributed-Memory Multicomputers. J. Parallel Distrib. Comput. 38(2): 158-175 (1996)
98		Shankar Ramaswamy, Barbara Simons, Prithviraj Banerjee: Optimizations for Efficient Array Redistribution on Distributed Memory Multicomputers. J. Parallel Distrib. Comput. 38(2): 217-228 (1996)
1995
97		Michael Peercy, Prithviraj Banerjee: Software Schemes of Reconfiguration and Recovery in Distributed Memory Multicomputers Using the Actor Model. FTCS 1995: 479-488
96	EE	Steven Parkes, Prithviraj Banerjee, Janak H. Patel: A parallel algorithm for fault simulation based on PROOFS . ICCD 1995: 616-
95	EE	Kaushik De, John A. Chandy, Sumit Roy, Steven Parkes, Prithviraj Banerjee: Parallel algorithms for logic synthesis using the MIS approach. IPPS 1995: 579-585
94	EE	Antonio Lain, Prithviraj Banerjee: Exploiting spatial regularity in irregular iterative applications. IPPS 1995: 820-826
93	EE	Ernesto Su, Antonio Lain, Shankar Ramaswamy, Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee: Advanced Compilation Techniques in the PARADIGM Compiler for Distributed-memory Multicomputers. International Conference on Supercomputing 1995: 424-433
92		Daniel J. Palermo, Prithviraj Banerjee: Automatic Selection of Dynamic Data Partitioning Schemes for Distributed-Memory Multicomputers. LCPC 1995: 392-406
91		Prithviraj Banerjee, John A. Chandy, Manish Gupta, Eugene W. Hodges IV, John G. Holm, Antonio Lain, Daniel J. Palermo, Shankar Ramaswamy, Ernesto Su: The Paradigm Compiler for Distributed-Memory Multicomputers. IEEE Computer 28(10): 37-47 (1995)
90	EE	Elizabeth M. Rudnick, Vivek Chickermane, Prithviraj Banerjee, Janak H. Patel: Sequential circuit testability enhancement using a nonscan approach. IEEE Trans. VLSI Syst. 3(2): 333-338 (1995)
89		Shankar Ramaswamy, Prithviraj Banerjee: Simultaneous Allocation and Scheduling Using Convex Programming Techniques. Parallel Processing Letters 5: 587-598 (1995)
1994
88	EE	Steven Parkes, Prithviraj Banerjee, Janak H. Patel: ProperHITEC: A Portable, Parallel, Object-Oriented Approach to Sequential Test Generation. DAC 1994: 717-721
87		Amber Roy-Chowdhury, Prithviraj Banerjee: Algorithm-Based Fault Location and Recovery for Matrix Computations. FTCS 1994: 38-47
86		Daniel J. Palermo, Ernesto Su, John A. Chandy, Prithviraj Banerjee: Communication Optimizations Used in the PARADIGM Compiler for Distributed Memory Multicomputers. ICPP 1994: 1-10
85		Shankar Ramaswamy, Sachin S. Sapatnekar, Prithviraj Banerjee: A Convex Programming Approach for Exploiting Data and Functional Parallelism on Distributed Memory Multicomputers. ICPP 1994: 116-125
84		Kaushik De, Prithviraj Banerjee: Parallel Logic Synthesis Using Partitioning. ICPP (3) 1994: 135-142
83		Ernesto Su, Daniel J. Palermo, Prithviraj Banerjee: Processor Tagged Descriptors: A Data Structure for Compiling for Distributed-Memory Multicomputers. IFIP PACT 1994: 123-132
82		Sungho Kim, Prithviraj Banerjee, Balkrishna Ramkumar, Steven Parkes, John A. Chandy: ProperPLACE: A Portable Parallel Algorithm for Standard Cell Placement. IPPS 1994: 932-941
81	EE	Antonio Lain, Prithviraj Banerjee: Techniques to overlap computation and communication in irregular iterative applications. International Conference on Supercomputing 1994: 236-245
80	EE	Steven Parkes, John A. Chandy, Prithviraj Banerjee: A library-based approach to portable, parallel, object-oriented programming: interface, implementation, and application. SC 1994: 69-78
79		Prithviraj Banerjee, Michael Peercy: Design and Evaluation of Hardware Strategies for Reconfiguring Hypercubes and Meshes Under Faults. IEEE Trans. Computers 43(7): 841-848 (1994)
78	EE	Kaushik De, Balkrishna Ramkumar, Prithviraj Banerjee: A portable parallel algorithm for logic synthesis using transduction. IEEE Trans. on CAD of Integrated Circuits and Systems 13(5): 566-580 (1994)
77	EE	Balkrishna Ramkumar, Prithviraj Banerjee: ProperCAD: A portable object-oriented parallel environment for VLSI CAD. IEEE Trans. on CAD of Integrated Circuits and Systems 13(7): 829-842 (1994)
1993
76	EE	Vivek Chickermane, Elizabeth M. Rudnick, Prithviraj Banerjee, Janak H. Patel: Non-Scan Design-for-Testability Techniques for Sequential Circuits. DAC 1993: 236-241
75		Amber Roy-Chowdhury, Prithviraj Banerjee: Tolerance Determination for Algorithm-Based Checks Using Simplified Error Analysis Techniques. FTCS 1993: 290-298
74		Amber Roy-Chowdhury, Prithviraj Banerjee: A Fault-Tolerant Parallel Algorithm for Iterative Solution of the Laplace Equation. ICPP 1993: 133-140
73		Shankar Ramaswamy, Prithviraj Banerjee: Processor Allocation and Scheduling of Macro Dataflow Graphs on Distributed Memory Multicomputers by the PARADIGM Compiler. ICPP 1993: 134-138
72		John A. Chandy, Prithviraj Banerjee: Reliability Evalutaion of Disk Array Architectures. ICPP 1993: 263-267
71		Ernesto Su, Daniel J. Palermo, Prithviraj Banerjee: Automating Parallelization of Regular Computations for Distributed-Memory. ICPP 1993: 30-38
70		Balkrishna Ramkumar, Prithviraj Banerjee: A Portable Parallel Algorithm for VLSI Circuit Extraction. IPPS 1993: 434-438
69	EE	Manish Gupta, Prithviraj Banerjee: PARADIGM: A Compiler for Automatic Data Distribution on Multicomputers. International Conference on Supercomputing 1993: 87-96
68		Chieng-Fai Lim, Prithviraj Banerjee, Kaushik De, Saburo Muroga: A Shared Memory Parallel Algorithm for Logic Synthesis. VLSI Design 1993: 317-322
67	EE	Krishna P. Belkhale, Randall J. Brouwer, Prithviraj Banerjee: Task scheduling for exploiting parallelism and hierarchy in VLSI CAD algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems 12(5): 557-567 (1993)
66		A. L. Narasimha Reddy, John A. Chandy, Prithviraj Banerjee: Design and Evaluation of Gracefully Degradable Disk Arrays. J. Parallel Distrib. Comput. 17(1-2): 28-40 (1993)
1992
65	EE	Sungho Kim, Prithviraj Banerjee, Vivek Chickermane, Janak H. Patel: APT: An Area-Performance-Testability Driven Placement Algorithm. DAC 1992: 141-146
64		Michael Peercy, Prithviraj Banerjee: Design and Analysis of Software Reconfiguration Strategies for Hypercube Multicomputers under Multiple Faults. FTCS 1992: 448-455
63	EE	Balkrishna Ramkumar, Prithviraj Banerjee: Portable parallel test generation for sequential circuits. ICCAD 1992: 220-223
62	EE	Kaushik De, Balkrishna Ramkumar, Prithviraj Banerjee: ProperSYN: a portable parallel algorithm for logic synthesis. ICCAD 1992: 412-416
61		Balkrishna Ramkumar, Prithviraj Banerjee: ProperCAd: A Portable Object-Oriented Parallel Environment for VLSI CAD. ICCD 1992: 544-548
60		John G. Holm, Prithviraj Banerjee: Low Cost Concurrent Error Detection in a VLIW Architecture Using Replicated Instructions. ICPP (1) 1992: 192-195
59	EE	Manish Gupta, Prithviraj Banerjee: A methodology for high-level synthesis of communication on multicomputers. ICS 1992: 357-367
58		Manish Gupta, Prithviraj Banerjee: Compile-Time Estimation of Communication Costs on Multicomputers. IPPS 1992: 470-475
57		Krishna P. Belkhale, Prithviraj Banerjee: Reconfiguration Strategies for VLSI Processor Arrays and Trees Using a Modified Diogenes Approach. IEEE Trans. Computers 41(1): 83-96 (1992)
56		Krishna P. Belkhale, Prithviraj Banerjee: Parallel Algorithms for Geometric Connected Component Labeling on a Hypercube Multiprocessor. IEEE Trans. Computers 41(6): 699-709 (1992)
55	EE	Manish Gupta, Prithviraj Banerjee: Demonstration of Automatic Data Partitioning Techniques for Parallelizing Compilers on Multicomputers. IEEE Trans. Parallel Distrib. Syst. 3(2): 179-193 (1992)
54	EE	Jiun-Ming Hsu, Prithviraj Banerjee: Performance Measurement and Trace Driven Simulation of Parallel CAD and Numeric Applications on a Hypercube Multicomputer. IEEE Trans. Parallel Distrib. Syst. 3(4): 451-464 (1992)
1991
53	EE	Srinivas Patil, Prithviraj Banerjee, Janak H. Patel: Parallel Test Generation for Sequential Circuits on General-Purpose Multiprocessors. DAC 1991: 155-159
52		A. L. Narasimha Reddy, Prithviraj Banerjee: Gracefully Degradable Disk Arrays. FTCS 1991: 401-409
51		Vijay Balasubramanian, Prithviraj Banerjee: CRAFT: Compiler-Assisted Algorithm-Based Fault Tolerance in Distributed Memory Multiprocessors. ICPP (1) 1991: 501-504
50		Jiun-Ming Hsu, Prithviraj Banerjee: Performance Evaluation of Hardware Support for Message Passing in Distributed Memory Multicomputers. ICPP (1) 1991: 604-607
49		A. L. Narasimha Reddy, Prithviraj Banerjee, D. K. Chen: Compiler Support for Parallel I/O Operations. ICPP (2) 1991: 290-291
48		Krishna P. Belkhale, Prithviraj Banerjee: A Scheduling Algorithm for Parallelizable Dependent Tasks. IPPS 1991: 500-506
47		Sungho Kim, Prithviraj Banerjee, Srinivas Patil: A Layout Driven Design for Testability Technique for MOS VLSI Circuits. ITC 1991: 157-165
46		Kaushik De, Prithviraj Banerjee: Logic Partitioning and Resynthesis for Testability. ITC 1991: 906-915
45	EE	Ralph-Michael Kling, Prithviraj Banerjee: Empirical and theoretical studies of the simulated evolution method applied to standard cell placement. IEEE Trans. on CAD of Integrated Circuits and Systems 10(10): 1303-1315 (1991)
44	EE	Srinivas Patil, Prithviraj Banerjee: Performance trade-offs in a parallel test generation/fault simulation environment. IEEE Trans. on CAD of Integrated Circuits and Systems 10(12): 1542-1558 (1991)
43	EE	Krishna P. Belkhale, Prithviraj Banerjee: Parallel algorithms for VLSI circuit extraction. IEEE Trans. on CAD of Integrated Circuits and Systems 10(5): 604-618 (1991)
1990
42	EE	Ralph-Michael Kling, Prithviraj Banerjee: Optimization by Simulated Evolution with Applications to Standard Cell Placement. DAC 1990: 20-25
41	EE	Randall J. Brouwer, Prithviraj Banerjee: PHIGURE: A Parallel Hierarchical Global Router. DAC 1990: 650-653
40		Krishna P. Belkhale, Prithviraj Banerjee: A Parallel Algorithm for Hierarchical Circuit Extraction. ICCAD 1990: 236-239
39		David Blaauw, Robert B. Mueller-Thuns, Daniel G. Saab, Prithviraj Banerjee, Jacob A. Abraham: SNEL: A Switch-Level Simulator Using Multiple Levels of Functional Abstraction. ICCAD 1990: 66-69
38		Jiun-Ming Hsu, Prithviraj Banerjee: Hardware Support for Message Routing in a Distributed Memory Multicomputer. ICPP (1) 1990: 508-515
37		Krishna P. Belkhale, Prithviraj Banerjee: An Approximate Algorithm for the Partitionable Independent Task Scheduling Problem. ICPP (1) 1990: 72-75
36		Krishna P. Belkhale, Prithviraj Banerjee: Geometric Connected Component Labeling on Distributed Memory Multicomputers. ICPP (3) 1990: 291-294
35		Jiun-Ming Hsu, Prithviraj Banerjee: Performance Measurement and Trace Driven Simulation of Parallel CAD and Numeric Applications on a Hypercube Multicomputer. ISCA 1990: 260-269
34		A. L. Narasimha Reddy, Prithviraj Banerjee: A Study of I/O Behavior of Perfect Benchmarks on a Multiprocessor. ISCA 1990: 312-321
33	EE	Jiun-Ming Hsu, Prithviraj Banerjee: A message passing coprocessor for distributed memory multicomputers. SC 1990: 720-729
32		A. L. Narasimha Reddy, Prithviraj Banerjee: Algorithms-Based Fault Detection for Signal Processing Applications. IEEE Trans. Computers 39(10): 1304-1308 (1990)
31		Vijay Balasubramanian, Prithviraj Banerjee: Compiler-Assisted Synthesis of Algorithm-Based Checking in Multiprocessors. IEEE Trans. Computers 39(4): 436-446 (1990)
30		Prithviraj Banerjee, Joseph T. Rahmeh, Craig B. Stunkel, V. S. S. Nair, Kaushik Roy, Vijay Balasubramanian, Jacob A. Abraham: Algorithm-Based Fault Tolerance on a Hypercube Multiprocessor. IEEE Trans. Computers 39(9): 1132-1145 (1990)
29	EE	Prithviraj Banerjee, Mark Howard Jones, Jeff S. Sargent: Parallel Simulated Annealing Algorithms for Cell Placement on Hypercube Multiprocessors. IEEE Trans. Parallel Distrib. Syst. 1(1): 91-106 (1990)
28	EE	A. L. Narasimha Reddy, Prithviraj Banerjee: Design, Analysis, and Simulation of I/O Architectures for Hypercube. IEEE Trans. Parallel Distrib. Syst. 1(2): 140-151 (1990)
27	EE	Vijay Balasubramanian, Prithviraj Banerjee: Tradeoffs in the Design of Efficient Algorithm-Based Error Detection Schemes for Hypercube Multiprocessors. IEEE Trans. Software Eng. 16(2): 183-196 (1990)
26	EE	Srinivas Patil, Prithviraj Banerjee: A parallel branch and bound algorithm for test generation. IEEE Trans. on CAD of Integrated Circuits and Systems 9(3): 313-322 (1990)
1989
25	EE	Srinivas Patil, Prithviraj Banerjee: A Parallel Branch and Bound Algorithm for Test Generation. DAC 1989: 339-343
24	EE	Jeff S. Sargent, Prithviraj Banerjee: A Parallel Row-based Algorithm for Standard Cell Placement with Integrated Error Control. DAC 1989: 590-593
23		A. L. Narasimha Reddy, Prithviraj Banerjee: Performance Evaluation of Multiple-Disk I/O Systems. ICPP (1) 1989: 315-318
22		Robert B. Mueller-Thuns, David McFarland, Prithviraj Banerjee: Algorithm-Based Fault Tolerance for Adaptive Least Squares Lattice Filtering on a Hypercube Multiprocessor. ICPP (3) 1989: 177-180
21	EE	A. L. Narasimha Reddy, Prithviraj Banerjee: I/O issues for hypercubes. ICS 1989: 72-81
20		Vijay Balasubramanian, Prithviraj Banerjee: Algorithm-based Error Detection for Signal Processing Applications on a Hypercube Multiprocessor. IEEE Real-Time Systems Symposium 1989: 134-143
19		Srinivas Patil, Prithviraj Banerjee: Fault Partitioning Issues in an Integrated Parallel Test Generation/Fault Simulation Environment. ITC 1989: 718-726
18		Prithviraj Banerjee, Abhijeet Dugar: The Design, Analysis and Simulation of a Fault-Tolerant Interconnection Network Supporting the Fetch-and-Add Primitive. IEEE Trans. Computers 38(1): 30-46 (1989)
17		A. L. Narasimha Reddy, Prithviraj Banerjee: An Evaluation of Multiple-Disk I/O Systems. IEEE Trans. Computers 38(12): 1680-1690 (1989)
16	EE	Ralph-Michael Kling, Prithviraj Banerjee: ESp: Placement by simulated evolution. IEEE Trans. on CAD of Integrated Circuits and Systems 8(3): 245-256 (1989)
1988
15		A. L. Narasimha Reddy, Prithviraj Banerjee: I/O Embedding in Hypercubes. ICPP (1) 1988: 331-338
14		Prithviraj Banerjee: The Cubical Ring Connected Cycles: A Fault-Tolerant Parallel Computation Network. IEEE Trans. Computers 37(5): 632-636 (1988)
13		Douglas B. West, Prithviraj Banerjee: On the Construction of Communication Networks Satisfying Bounded Fan-In of Service Ports. IEEE Trans. Computers 37(9): 1148-1151 (1988)
1987
12	EE	Ralph-Michael Kling, Prithviraj Banerjee: ESP: A New Standard Cell Placement Package Using Simulated Evolution. DAC 1987: 60-66
11	EE	M. Jones, Prithviraj Banerjee: Performance of a Parallel Algorithm for Standard Cell Placement on the Intel Hypercube. DAC 1987: 807-813
10	EE	A. L. Narasimha Reddy, Prithviraj Banerjee: A Fault Secure Dictionary Machine. ICDE 1987: 104-110
9		Vijay Balasubramanian, Prithviraj Banerjee: A Fixed Size Array Processor for Computing the Fast Fourier Transform. IEEE Real-Time Systems Symposium 1987: 36-43
8		Vijay Balasubramanian, Prithviraj Banerjee: A Fault Tolerant Massively Parallel Processing Architecture. J. Parallel Distrib. Comput. 4(4): 363-383 (1987)
1986
7		Prithviraj Banerjee, Abhijeet Dugar: A Fault-Tolerant Interconnection Network Supporting the Fetch-And-Add Primitive. ICPP 1986: 327-334
6		Vijay Balasubramanian, Prithviraj Banerjee: RECBAR : A Reconfigurable Massively Parallel Processing Architecture. ICPP 1986: 390-393
5		Prithviraj Banerjee, Jacob A. Abraham: A Probabilistic Model of Algorithm-Based Fault Tolerance in Array Processors for Real-Time Systems. IEEE Real-Time Systems Symposium 1986: 72-78
4		Prithviraj Banerjee, Jacob A. Abraham: Bounds on Algorithm-Based Fault Tolerance in Multiple Processor Systems. IEEE Trans. Computers 35(4): 296-306 (1986)
1985
3	EE	Prithviraj Banerjee, Jacob A. Abraham: A Multivalued Algebra For Modeling Physical Failures in MOS VLSI Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 4(3): 312-321 (1985)
1984
2		Prithviraj Banerjee, Jacob A. Abraham: Fault-Secure Algorithms for Multiple-Processor Systems. ISCA 1984: 279-287
1983
1		Prithviraj Banerjee, Jacob A. Abraham: Generating Tests for Physical Failures in MOS Logic Circuits. ITC 1983: 554-559

Coauthor Index

1 Jacob A. Abraham [1] [2] [3] [4] [5] [30] [39] [101]

2 R. Anderson [214] [218]

3 Harm Arts [147] [150]

4 Eduard Ayguadé [162] [192]

5 C. Bachmann [185]

6 Debabrata Bagchi [207] [209] [214] [216] [218]

7 Vijay Balasubramanian [6] [8] [9] [20] [27] [30] [31] [51]

8 Krishna P. Belkhale [36] [37] [40] [43] [48] [56] [57] [67] [173]

9 Nikolas Bellas [102]

10 David Blaauw (David T. Blaauw) [39]

11 Vamsi Boppana [115]

12 Randall J. Brouwer [41] [67]

13 Dhruva R. Chakrabarti [139] [142] [161] [166] [175] [191] [200]

14 John A. Chandy [66] [72] [80] [82] [86] [91] [95] [106] [109] [118] [124] [126] [129] [155]

15 D. K. Chen [49]

16 Vivek Chickermane [65] [76] [90]

17 Alok N. Choudhary [136] [137] [138] [139] [143] [144] [146] [149] [154] [156] [158] [160] [162] [164] [167] [168] [176] [182] [185] [186] [187] [188] [192] [194] [195] [196] [197] [198] [201] [202] [204] [208] [209] [210]

18 Jim E. Crenshaw [159] [171]

19 Kaushik De [46] [62] [68] [78] [84] [95] [181]

20 Robert P. Dick [231] [236] [241] [243]

21 Abhijeet Dugar [7] [18]

22 W. Kent Fuchs [115]

23 Lei Gao [245]

24 Manish Gupta [55] [58] [59] [69] [91]

25 Malay Haldar [182] [185] [187] [188] [198] [201] [202] [204] [207] [208] [214] [216] [218]

26 Gagan Hasteer [112] [116] [122] [124] [128] [131] [132] [133] [148] [152] [206]

27 Scott Hauck [179] [185]

28 Eugene W. Hodges IV [91] [93] [99] [107] [110] [111] [203]

29 John G. Holm [60] [91] [124] [130]

30 Michael S. Hsiao [123]

31 Jiun-Ming Hsu [33] [35] [38] [50] [54]

32 Tianyi Jiang [221] [227] [228] [230]

33 Pramod G. Joisha [165] [177] [178] [182] [185] [193] [196] [199] [205] [212] [217] [235] [238]

34 Alex K. Jones [185] [209] [213] [215] [219] [228] [230]

35 M. Jones [11]

36 Mark Howard Jones [29]

37 Mahmut T. Kandemir [136] [137] [138] [143] [144] [146] [149] [154] [156] [158] [160] [162] [164] [167] [168] [176] [192] [194] [197] [210]

38 Abhay Kanhere [182] [185] [196]

39 Sungho Kim [47] [65] [82] [118]

40 Victor Kim [151] [181] [207] [214] [216] [218]

41 Ralph-Michael Kling [12] [16] [42] [45]

42 Dilip Krishnaswamy [120] [121] [123] [127]

43 Venkatram Krishnaswamy [105] [124] [128] [140] [206]

44 Antonio Lain [81] [91] [93] [94] [108] [142] [175]

45 Chieng-Fai Lim [68]

46 Chuan Lin [242]

47 C. L. Liu (Chung Laung (Dave) Liu) [115]

48 Nikolaos D. Liveris [223] [233] [242] [243] [244]

49 Ky MacPherson [100]

50 Arindam Mallik [237] [239]

51 Anmol Mathur [131] [133] [148] [152]

52 David McFarland [22]

53 Gokhan Memik [234]

54 Amitabh Mishra [172] [211]

55 Gaurav Mittal [222] [225] [226] [231] [234] [236] [240] [241] [245] [247]

56 Andreas Moshovos [179]

57 Robert B. Mueller-Thuns [22] [39]

58 Rajarshi Mukherjee [219]

59 Saburo Muroga [68]

60 V. S. S. Nair [30] [101]

61 Anshuman Nayak [182] [185] [187] [188] [198] [201] [202] [204] [207] [208] [214] [216] [218]

62 Satrajit Pal [207] [209] [214] [218]

63 Daniel J. Palermo [71] [83] [86] [91] [92] [93] [99] [107] [111] [203]

64 Steven Parkes [80] [82] [88] [95] [96] [109] [118] [124] [130] [218]

65 Janak H. Patel [53] [65] [76] [88] [90] [96] [120] [121] [123]

66 Srinivas Patil [19] [25] [26] [44] [47] [53]

67 Michael Peercy [64] [79] [97]

68 S. Periyacheri [185]

69 Pradeep Prabhakaran [113] [134] [157] [159] [171]

70 Viktor K. Prasanna (V. K. Prasanna Kumar) [174]

71 Joseph T. Rahmeh [30]

72 J. Ramanujam [136] [137] [138] [143] [144] [146] [149] [154] [156] [158] [160] [162] [164] [167] [168] [176] [192] [194] [210]

73 Shankar Ramaswamy [73] [85] [89] [91] [93] [98] [110] [119]

74 Balkrishna Ramkumar [61] [62] [63] [70] [77] [78] [82] [117] [118]

75 A. L. Narasimha Reddy [10] [15] [17] [21] [23] [28] [32] [34] [49] [52] [66]

76 Kaushik Roy [30] [189]

77 Sanghamitra Roy [220] [224] [229]

78 Sumit Roy [95] [124] [125] [135] [147] [150] [173]

79 Amber Roy-Chowdhury [74] [75] [87] [102] [103] [104] [114]

80 Elizabeth M. Rudnick [76] [90] [120] [121] [123]

81 Daniel G. Saab [39]

82 Sachin S. Sapatnekar [85] [119]

83 Jeff S. Sargent [24] [29]

84 Majid Sarrafzadeh [135] [153] [159] [171] [189]

85 Prashant Saxena [115]

86 Vikram Saxena [123] [214] [218]

87 Dan Schonfeld [245]

88 U. Nagaraj Shenoy [138] [139] [143] [146] [149] [156] [158] [176] [182] [184] [185] [186] [195] [196] [197] [198] [199]

89 Barbara B. Simons (Barbara Simons) [98]

90 Bhabani P. Sinha [174]

91 Debjit Sinha [220] [237] [239]

92 Craig B. Stunkel [30]

93 Ernesto Su [71] [83] [86] [91] [93] [111]

94 Xiaoyong Tang [209] [221] [222] [225] [226] [227] [228] [230] [232] [240]

95 Nikhil Tripathi [207] [214] [218]

96 J. R. Uribe [214] [218]

97 R. Uribe [216]

98 M. Walkden [185]

99 J. Wang [242]

100 Maogang Wang [153]

101 Douglas B. West [13]

102 Zhaoyun Xing [126] [141] [145]

103 Zhi Alex Ye [179] [184]

104 Yanhong Yuan [163] [169] [170] [180] [183] [190]

105 David Zaretsky [185] [218] [222] [225] [226] [231] [234] [236] [240] [241] [245] [247]

106 Hai Zhou [232] [233] [237] [239] [242] [243] [244]

Colors in the list of coauthors

1	Jacob A. Abraham	[1] [2] [3] [4] [5] [30] [39] [101]
2	R. Anderson	[214] [218]
3	Harm Arts	[147] [150]
4	Eduard Ayguadé	[162] [192]
5	C. Bachmann	[185]
6	Debabrata Bagchi	[207] [209] [214] [216] [218]
7	Vijay Balasubramanian	[6] [8] [9] [20] [27] [30] [31] [51]
8	Krishna P. Belkhale	[36] [37] [40] [43] [48] [56] [57] [67] [173]
9	Nikolas Bellas	[102]
10	David Blaauw (David T. Blaauw)	[39]
11	Vamsi Boppana	[115]
12	Randall J. Brouwer	[41] [67]
13	Dhruva R. Chakrabarti	[139] [142] [161] [166] [175] [191] [200]
14	John A. Chandy	[66] [72] [80] [82] [86] [91] [95] [106] [109] [118] [124] [126] [129] [155]
15	D. K. Chen	[49]
16	Vivek Chickermane	[65] [76] [90]
17	Alok N. Choudhary	[136] [137] [138] [139] [143] [144] [146] [149] [154] [156] [158] [160] [162] [164] [167] [168] [176] [182] [185] [186] [187] [188] [192] [194] [195] [196] [197] [198] [201] [202] [204] [208] [209] [210]
18	Jim E. Crenshaw	[159] [171]
19	Kaushik De	[46] [62] [68] [78] [84] [95] [181]
20	Robert P. Dick	[231] [236] [241] [243]
21	Abhijeet Dugar	[7] [18]
22	W. Kent Fuchs	[115]
23	Lei Gao	[245]
24	Manish Gupta	[55] [58] [59] [69] [91]
25	Malay Haldar	[182] [185] [187] [188] [198] [201] [202] [204] [207] [208] [214] [216] [218]
26	Gagan Hasteer	[112] [116] [122] [124] [128] [131] [132] [133] [148] [152] [206]
27	Scott Hauck	[179] [185]
28	Eugene W. Hodges IV	[91] [93] [99] [107] [110] [111] [203]
29	John G. Holm	[60] [91] [124] [130]
30	Michael S. Hsiao	[123]
31	Jiun-Ming Hsu	[33] [35] [38] [50] [54]
32	Tianyi Jiang	[221] [227] [228] [230]
33	Pramod G. Joisha	[165] [177] [178] [182] [185] [193] [196] [199] [205] [212] [217] [235] [238]
34	Alex K. Jones	[185] [209] [213] [215] [219] [228] [230]
35	M. Jones	[11]
36	Mark Howard Jones	[29]
37	Mahmut T. Kandemir	[136] [137] [138] [143] [144] [146] [149] [154] [156] [158] [160] [162] [164] [167] [168] [176] [192] [194] [197] [210]
38	Abhay Kanhere	[182] [185] [196]
39	Sungho Kim	[47] [65] [82] [118]
40	Victor Kim	[151] [181] [207] [214] [216] [218]
41	Ralph-Michael Kling	[12] [16] [42] [45]
42	Dilip Krishnaswamy	[120] [121] [123] [127]
43	Venkatram Krishnaswamy	[105] [124] [128] [140] [206]
44	Antonio Lain	[81] [91] [93] [94] [108] [142] [175]
45	Chieng-Fai Lim	[68]
46	Chuan Lin	[242]
47	C. L. Liu (Chung Laung (Dave) Liu)	[115]
48	Nikolaos D. Liveris	[223] [233] [242] [243] [244]
49	Ky MacPherson	[100]
50	Arindam Mallik	[237] [239]
51	Anmol Mathur	[131] [133] [148] [152]
52	David McFarland	[22]
53	Gokhan Memik	[234]
54	Amitabh Mishra	[172] [211]
55	Gaurav Mittal	[222] [225] [226] [231] [234] [236] [240] [241] [245] [247]
56	Andreas Moshovos	[179]
57	Robert B. Mueller-Thuns	[22] [39]
58	Rajarshi Mukherjee	[219]
59	Saburo Muroga	[68]
60	V. S. S. Nair	[30] [101]
61	Anshuman Nayak	[182] [185] [187] [188] [198] [201] [202] [204] [207] [208] [214] [216] [218]
62	Satrajit Pal	[207] [209] [214] [218]
63	Daniel J. Palermo	[71] [83] [86] [91] [92] [93] [99] [107] [111] [203]
64	Steven Parkes	[80] [82] [88] [95] [96] [109] [118] [124] [130] [218]
65	Janak H. Patel	[53] [65] [76] [88] [90] [96] [120] [121] [123]
66	Srinivas Patil	[19] [25] [26] [44] [47] [53]
67	Michael Peercy	[64] [79] [97]
68	S. Periyacheri	[185]
69	Pradeep Prabhakaran	[113] [134] [157] [159] [171]
70	Viktor K. Prasanna (V. K. Prasanna Kumar)	[174]
71	Joseph T. Rahmeh	[30]
72	J. Ramanujam	[136] [137] [138] [143] [144] [146] [149] [154] [156] [158] [160] [162] [164] [167] [168] [176] [192] [194] [210]
73	Shankar Ramaswamy	[73] [85] [89] [91] [93] [98] [110] [119]
74	Balkrishna Ramkumar	[61] [62] [63] [70] [77] [78] [82] [117] [118]
75	A. L. Narasimha Reddy	[10] [15] [17] [21] [23] [28] [32] [34] [49] [52] [66]
76	Kaushik Roy	[30] [189]
77	Sanghamitra Roy	[220] [224] [229]
78	Sumit Roy	[95] [124] [125] [135] [147] [150] [173]
79	Amber Roy-Chowdhury	[74] [75] [87] [102] [103] [104] [114]
80	Elizabeth M. Rudnick	[76] [90] [120] [121] [123]
81	Daniel G. Saab	[39]
82	Sachin S. Sapatnekar	[85] [119]
83	Jeff S. Sargent	[24] [29]
84	Majid Sarrafzadeh	[135] [153] [159] [171] [189]
85	Prashant Saxena	[115]
86	Vikram Saxena	[123] [214] [218]
87	Dan Schonfeld	[245]
88	U. Nagaraj Shenoy	[138] [139] [143] [146] [149] [156] [158] [176] [182] [184] [185] [186] [195] [196] [197] [198] [199]
89	Barbara B. Simons (Barbara Simons)	[98]
90	Bhabani P. Sinha	[174]
91	Debjit Sinha	[220] [237] [239]
92	Craig B. Stunkel	[30]
93	Ernesto Su	[71] [83] [86] [91] [93] [111]
94	Xiaoyong Tang	[209] [221] [222] [225] [226] [227] [228] [230] [232] [240]
95	Nikhil Tripathi	[207] [214] [218]
96	J. R. Uribe	[214] [218]
97	R. Uribe	[216]
98	M. Walkden	[185]
99	J. Wang	[242]
100	Maogang Wang	[153]
101	Douglas B. West	[13]
102	Zhaoyun Xing	[126] [141] [145]
103	Zhi Alex Ye	[179] [184]
104	Yanhong Yuan	[163] [169] [170] [180] [183] [190]
105	David Zaretsky	[185] [218] [222] [225] [226] [231] [234] [236] [240] [241] [245] [247]
106	Hai Zhou	[232] [233] [237] [239] [242] [243] [244]