| 2006 |
|---|
| 6 | EE | Nobuyuki Ohba,
Kohji Takano:
Hardware debugging method based on signal transitions and transactions.
ASP-DAC 2006: 454-459 |
| 5 | EE | Nobuyuki Ohba,
Kohji Takano:
Hardware Design Verification Using Signal Transitions and Transactions.
IEICE Transactions 89-A(4): 1012-1017 (2006) |
| 2004 |
|---|
| 4 | EE | Nobuyuki Ohba,
Kohji Takano:
An SoC design methodology using FPGAs and embedded microprocessors.
DAC 2004: 747-752 |
| 2003 |
|---|
| 3 | EE | Akashi Satoh,
Kohji Takano:
A Scalable Dual-Field Elliptic Curve Cryptographic Processor.
IEEE Trans. Computers 52(4): 449-460 (2003) |
| 2001 |
|---|
| 2 | EE | Akashi Satoh,
Sumio Morioka,
Kohji Takano,
Seiji Munetoh:
A Compact Rijndael Hardware Architecture with S-Box Optimization.
ASIACRYPT 2001: 239-254 |
| 2000 |
|---|
| 1 | | Akashi Satoh,
Nobuyuki Ooba,
Kohji Takano,
Edward D'Avignon:
High-Speed MARS Hardware.
AES Candidate Conference 2000: 305-316 |
