2007 | ||
---|---|---|
43 | EE | Bruno Albertini, Sandro Rigo, Guido Araujo, Cristiano C. de Araujo, Edna Barros, Willians Azevedo: A computational reflection mechanism to support platform debugging in SystemC. CODES+ISSS 2007: 81-86 |
42 | EE | Fernando Kronbauer, Alexandro Baldassin, Bruno Albertini, Paulo Centoducatte, Sandro Rigo, Guido Araujo, Rodolfo Azevedo: A Flexible Platform Framework for Rapid Transactional Memory Systems Prototyping and Evaluation. IEEE International Workshop on Rapid System Prototyping 2007: 123-129 |
41 | EE | Felipe Klein, Guido Araujo, Rodolfo Azevedo, Roberto Leao, Luiz C. V. dos Santos: A multi-model power estimation engine for accuracy optimization. ISLPED 2007: 280-285 |
40 | EE | Richard Maciel, Bruno Albertini, Sandro Rigo, Guido Araujo, Rodolfo Azevedo: A Methodology and Toolset to Enable SystemC and VHDL Co-simulation. ISVLSI 2007: 351-356 |
39 | EE | Felipe Klein, Guido Araujo, Rodolfo Azevedo, Roberto Leao, Luiz C. V. dos Santos: On the Limitations of Power Macromodeling Techniques. ISVLSI 2007: 395-400 |
38 | EE | Marcio Juliato, Guido Araujo, Julio López, Ricardo Dahab: A Custom Instruction Approach for Hardware and Software Implementations of Finite Field Arithmetic over F2163 using Gaussian Normal Bases. VLSI Signal Processing 47(1): 59-76 (2007) |
2006 | ||
37 | EE | Ricardo Santos, Rodolfo Azevedo, Guido Araujo: 2D-VLIW: An Architecture Based on the Geometry of Computation. ASAP 2006: 87-94 |
36 | EE | Edson Borin, Cheng Wang, Youfeng Wu, Guido Araujo: Software-Based Transparent and Comprehensive Control-Flow Error Detection. CGO 2006: 333-345 |
35 | EE | Edson Borin, Mauricio Breternitz Jr., Youfeng Wu, Guido Araujo: Clustering-Based Microcode Compression. ICCD 2006 |
34 | EE | Ricardo Santos, Rodolfo Azevedo, Guido Araujo: Exploiting dynamic reconfiguration techniques: the 2D-VLIW approach. IPDPS 2006 |
33 | EE | Desiree Ottoni, Guilherme Ottoni, Guido Araujo, Rainer Leupers: Offset assignment using simultaneous variable coalescing. ACM Trans. Embedded Comput. Syst. 5(4): 864-883 (2006) |
2005 | ||
32 | EE | Cristiano C. de Araujo, Edna Barros, Rodolfo Azevedo, Guido Araujo: Processor Centric Specification and Modelling of MPSoCs. FDL 2005: 303-315 |
31 | Marcio Juliato, Guido Araujo, Julio López, Ricardo Dahab: A custom instruction approach for hardware and software implementations of finite field arithmetic over F263 using Gaussian normal bases. FPT 2005: 5-12 | |
30 | EE | Richard E. Billo, Rodolfo Azevedo, Guido Araujo, Paulo Centoducatte, Eduardo Wanderley Netto: Design of a decompressor engine on a SPARC processor. SBCCI 2005: 110-114 |
29 | EE | Cid C. de Souza, André M. Lima, Guido Araujo, Nahri Moreano: The datapath merging problem in reconfigurable systems: Complexity, dual bounds and heuristic evaluation. ACM Journal of Experimental Algorithmics 10: (2005) |
28 | EE | Nahri Moreano, Edson Borin, Cid C. de Souza, Guido Araujo: Efficient datapath merging for partially reconfigurable architectures. IEEE Trans. on CAD of Integrated Circuits and Systems 24(7): 969-980 (2005) |
27 | EE | Rodolfo Azevedo, Sandro Rigo, Marcus Bartholomeu, Guido Araujo, Cristiano C. de Araujo, Edna Barros: The ArchC Architecture Description Language and Tools. International Journal of Parallel Programming 33(5): 453-484 (2005) |
2004 | ||
26 | EE | Eduardo Wanderley Netto, Rodolfo Azevedo, Paulo Centoducatte, Guido Araujo: Multi-profile based code compression. DAC 2004: 244-249 |
25 | EE | Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Azevedo, Guido Araujo: Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology. DATE 2004: 734-735 |
24 | Edson Borin, Felipe Klein, Nahri Moreano, Rodolfo Azevedo, Guido Araujo: Fast instruction set custornization. ESTImedia 2004: 53-58 | |
23 | EE | Eduardo Wanderley Netto, Rodolfo Azevedo, Paulo Centoducatte, Guido Araujo: Multi-Profile Instruction Based Compression. SBAC-PAD 2004: 23-29 |
22 | EE | Sandro Rigo, Guido Araujo, Marcus Bartholomeu, Rodolfo Azevedo: ArchC: A SystemC-Based Architecture Description Language. SBAC-PAD 2004: 66-73 |
21 | EE | Marcus Bartholomeu, Rodolfo Azevedo, Sandro Rigo, Guido Araujo: Optimizations for Compiled Simulation Using Instruction Type Information. SBAC-PAD 2004: 74-81 |
20 | EE | Karina R. G. da Silva, Elmar U. K. Melcher, Guido Araujo, Valdiney Alves Pimenta: An automatic testbench generation tool for a SystemC functional verification methodology. SBCCI 2004: 66-70 |
19 | EE | Cid C. de Souza, André M. Lima, Nahri Moreano, Guido Araujo: The Datapath Merging Problem in Reconfigurable Systems: Lower Bounds and Heuristic Evaluation. WEA 2004: 545-558 |
18 | EE | Zhining Huang, Sharad Malik, Nahri Moreano, Guido Araujo: The design of dynamically reconfigurable datapath coprocessors. ACM Trans. Embedded Comput. Syst. 3(2): 361-384 (2004) |
2003 | ||
17 | EE | Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Azevedo, Guido Araujo: Exploring Memory Hierarchy with ArchC. SBAC-PAD 2003: 2-9 |
16 | EE | Desiree Ottoni, Guilherme Ottoni, Guido Araujo, Rainer Leupers: Improving Offset Assignment through Simultaneous Variable Coalescing. SCOPES 2003: 285-297 |
15 | EE | Guilherme Ottoni, Guido Araujo: Address register allocation for arrays in loops of embedded programs. Microelectronics Journal 34(11): 1009-1018 (2003) |
2002 | ||
14 | EE | Guido Araujo, Sharad Malik, Zhining Huang, Nahri Moreano: Datapath Merging and Interconnection Sharing for Reconfigurable Architectures. ISSS 2002: 38-43 |
13 | EE | Guido Araujo, Guilherme Ottoni, Marcelo Silva Cintra: Global array reference allocation. ACM Trans. Design Autom. Electr. Syst. 7(2): 336-357 (2002) |
2001 | ||
12 | EE | Marcio Buss, Rodolfo Azevedo, Paulo Centoducatte, Guido Araujo: Tailoring pipeline bypassing and functional unit mapping to application in clustered VLIW architectures. CASES 2001: 141-148 |
11 | EE | Guilherme Ottoni, Sandro Rigo, Guido Araujo, Subramanian Rajagopalan, Sharad Malik: Optimal Live Range Merge for Address Register Allocation in Embedded Programs. CC 2001: 274-288 |
10 | EE | Subramanian Rajagopalan, Sreeranga P. Rajan, Sharad Malik, Sandro Rigo, Guido Araujo, Koichiro Takayama: A retargetable VLIW compiler framework for DSPs withinstruction-level parallelism. IEEE Trans. on CAD of Integrated Circuits and Systems 20(11): 1319-1328 (2001) |
2000 | ||
9 | EE | Marcelo Silva Cintra, Guido Araujo: Array Reference Allocation Using SSA-Form and Live Range Growth. LCTES 2000: 48-62 |
8 | EE | Guido Araujo, Paulo Centoducatte, Rodolfo Azevedo, Ricardo Pannain: Expression-tree-based algorithms for code compression on embedded RISC architectures. IEEE Trans. VLSI Syst. 8(5): 530-533 (2000) |
1999 | ||
7 | EE | Paulo Centoducatte, Ricardo Pannain, Guido Araujo: Compressed Code Execution on DSP Architectures. ISSS 1999: 56-63 |
1998 | ||
6 | EE | Guido Araujo, Paulo Centoducatte, Mario Cartes, Ricardo Pannain: Code Compression Based on Operand Factorization. MICRO 1998: 194-201 |
5 | EE | Guido Araujo, Sharad Malik: Code generation for fixed-point DSPs. ACM Trans. Design Autom. Electr. Syst. 3(2): 136-161 (1998) |
1996 | ||
4 | EE | Guido Araujo, Sharad Malik, Mike Tien-Chien Lee: Using Register-Transfer Paths in Code Generation for Heterogeneous Memory-Register Architectures. DAC 1996: 591-596 |
3 | EE | Guido Araujo, Ashok Sudarsanam, Sharad Malik: Instruction Set Design and Optimizations for Address Computation in DSP Architectures. ISSS 1996: 102-107 |
1995 | ||
2 | EE | Guido Araujo, Sharad Malik: Optimal code generation for embedded memory non-homogeneous register architectures. ISSS 1995: 36-41 |
1994 | ||
1 | Guido Araujo, Srinivas Devadas, Kurt Keutzer, Stan Y. Liao, Sharad Malik, Ashok Sudarsanam, Steven W. K. Tjiang, Albert Wang: Challenges in code generation for embedded processors. Code Generation for Embedded Processors 1994: 48-64 |