Steven M. Nowick

2008
57	EE	Cheoljoo Jeong, Steven M. Nowick: Technology Mapping and Cell Merger for Asynchronous Threshold Networks. IEEE Trans. on CAD of Integrated Circuits and Systems 27(4): 659-672 (2008)
2007
56	EE	Cheoljoo Jeong, Steven M. Nowick: Optimization of Robust Asynchronous Circuits by Local Input Completeness Relaxation. ASP-DAC 2007: 622-627
55	EE	Melinda Y. Agyekum, Steven M. Nowick: A Cycle-Based Decomposition Method for Burst-Mode Asynchronous Controllers. ASYNC 2007: 129-142
54	EE	Amitava Mitra, William F. McLaughlin, Steven M. Nowick: Efficient Asynchronous Protocol Converters for Two-Phase Delay-Insensitive Global Communication. ASYNC 2007: 186-195
53	EE	Peggy B. McGee, Steven M. Nowick: An efficient algorithm for time separation of events in concurrent systems. ICCAD 2007: 180-187
52	EE	Montek Singh, Steven M. Nowick: The Design of High-Performance Dynamic Asynchronous Pipelines: Lookahead Style. IEEE Trans. VLSI Syst. 15(11): 1256-1269 (2007)
51	EE	Montek Singh, Steven M. Nowick: The Design of High-Performance Dynamic Asynchronous Pipelines: High-Capacity Style. IEEE Trans. VLSI Syst. 15(11): 1270-1283 (2007)
50	EE	Montek Singh, Steven M. Nowick: MOUSETRAP: High-Speed Transition-Signaling Asynchronous Pipelines. IEEE Trans. VLSI Syst. 15(6): 684-698 (2007)
2006
49	EE	Cheoljoo Jeong, Steven M. Nowick: Optimal Technology Mapping and Cell Merger for Asynchronous Threshold Networks. ASYNC 2006: 128-137
2005
48	EE	Peggy B. McGee, Steven M. Nowick, Edward G. Coffman Jr.: Efficient performance analysis of asynchronous systems based on periodicity. CODES+ISSS 2005: 225-230
47	EE	Peggy B. McGee, Steven M. Nowick: A lattice-based framework for the classification and design of asynchronous pipelines. DAC 2005: 491-496
2004
46	EE	Cheoljoo Jeong, Steven M. Nowick: Fast hazard detection in combinational circuits. DAC 2004: 592-595
45	EE	Tiberiu Chelcea, Steven M. Nowick: Robust interfaces for mixed-timing systems. IEEE Trans. VLSI Syst. 12(8): 857-873 (2004)
2003
44	EE	Steven M. Nowick, Charles W. O'Donnell: On the Existence of Hazard-Free Multi-Level Logic. ASYNC 2003: 109-120
43	EE	Yee William Li, George Patounakis, Anup Jose, Kenneth L. Shepard, Steven M. Nowick: Asynchronous Datapath with Software-Controlled On-Chip Adaptive Voltage Scaling for Multirate Signal Processing Application. ASYNC 2003: 216-226
42	EE	Soha Hassoun, Steven M. Nowick, Leon Stok: Guest Editorial. IEEE Trans. on CAD of Integrated Circuits and Systems 22(6): 662-664 (2003)
2002
41	EE	José A. Tierno, Sergey Rylov, Alexander Rylyakov, Montek Singh, Steven M. Nowick: An Adaptively-Pipelined Mixed Synchronous-Asynchronous Digital FIR Filter Chip Operating at 1.3 GigaHertz. ASYNC 2002: 84-
40	EE	Tiberiu Chelcea, Steven M. Nowick: Resynthesis and peephole transformations for the optimization of large-scale asynchronous systems. DAC 2002: 405-410
39	EE	Recep O. Ozdag, Peter A. Beerel, Montek Singh, Steven M. Nowick: High-Speed Non-Linear Asynchronous Pipelines. DATE 2002: 1000-1007
38	EE	Tiberiu Chelcea, Steven M. Nowick, Andrew Bardsley, Doug Edwards: A Burst-Mode Oriented Back-End for the Balsa Synthesis System. DATE 2002: 330-337
37		Tiberiu Chelcea, Steven M. Nowick: Resynthesis and Peephole Transformations for the Optimization of Large-Scale Asynchronous Systems. IWLS 2002: 355-360
2001
36	EE	Tiberiu Chelcea, Steven M. Nowick: Robust Interfaces for Mixed-Timing Systems with Application to Latency-Insensitive Protocols. DAC 2001: 21-26
35	EE	Michael Theobald, Steven M. Nowick: Transformations for the Synthesis and Optimization of Asynchronous Distributed Control. DAC 2001: 263-268
34		Montek Singh, Steven M. Nowick: MOUSETRAP: Ultra-High-Speed Transition-Signaling Asynchronous Pipelines. ICCD 2001: 9-17
2000
33	EE	Montek Singh, Steven M. Nowick: High-Throughput Asynchronous Pipelines for Fine-Grain Dynamic Datapaths. ASYNC 2000: 198-
32	EE	Tiberiu Chelcea, Steven M. Nowick: Low-Latency Asynchronous FIFO's Using Token Rings. ASYNC 2000: 210-
31	EE	Montek Singh, Steven M. Nowick: Synthesis for logical initializability of synchronous finite-state machines. IEEE Trans. VLSI Syst. 8(5): 542-557 (2000)
1999
30	EE	Erik Brunvand, Steven M. Nowick, Kenneth Y. Yun: Practical Advances in Asynchronous Design and in Asynchronous/Synchronous Interfaces. DAC 1999: 104-109
29	EE	Robert M. Fuhrer, Steven M. Nowick: OPTIMISTA: state minimization of asynchronous FSMs for optimum output logic. ICCAD 1999: 7-13
1998
28	EE	Martin Benes, Steven M. Nowick, Andrew Wolfe: A Fast Asynchronous Huffman Decoder for Compressed-Code Embedded Processors. ASYNC 1998: 43-
27	EE	Michael Theobald, Steven M. Nowick: An Implicit Method for Hazard-Free Two-Level Logic Minimization. ASYNC 1998: 58-69
26	EE	Luis A. Plana, Steven M. Nowick: Architectural optimization for low-power nonpipelined asynchronous systems. IEEE Trans. VLSI Syst. 6(1): 56-65 (1998)
25	EE	Michael Theobald, Steven M. Nowick: Fast heuristic and exact algorithms for two-level hazard-free logic minimization. IEEE Trans. on CAD of Integrated Circuits and Systems 17(11): 1130-1147 (1998)
1997
24	EE	Martin Benes, Andrew Wolfe, Steven M. Nowick: A High-Speed Asynchronous Decompression Circuit for Embedded Processors. ARVLSI 1997: 219-237
23	EE	Steven M. Nowick, Kenneth Y. Yun, Ayoob E. Dooply, Peter A. Beerel: Speculative Completion for the Design of High-Performance Asynchronous Dynamic Adders. ASYNC 1997: 210-
22	EE	Robert M. Fuhrer, Steven M. Nowick: OPTIMIST: state minimization for optimal 2-level logic implementation. ICCAD 1997: 308-315
21		Erik Brunvand, Steven M. Nowick, Kenneth Y. Yun: Practical Advances in Asynchronous Design. ICCD 1997: 662-668
20	EE	Steven M. Nowick, Michael Theobald: Synthesis of low-power asynchronous circuits in a specified environment. ISLPED 1997: 92-95
19	EE	Montek Singh, Steven M. Nowick: Synthesis for Logical Initializability of Synchronous Finite State Machines. VLSI Design 1997: 76-81
18	EE	Steven M. Nowick, Niraj K. Jha, Fu-Chiung Cheng: Synthesis of asynchronous circuits for stuck-at and robust path delay fault testability. IEEE Trans. on CAD of Integrated Circuits and Systems 16(12): 1514-1521 (1997)
1996
17	EE	Michael Theobald, Steven M. Nowick, Tao Wu: Espresso-HF: A Heuristic Hazard-Free Minimizer for Two-Level Logic. DAC 1996: 71-76
16	EE	Prabhakar Kudva, Ganesh Gopalakrishnan, Hans M. Jacobson, Steven M. Nowick: Synthesis for Hazard-free Customized CMOS Complex-Gate Networks Under Multiple-Input Changes. DAC 1996: 77-82
15	EE	Luis A. Plana, Steven M. Nowick: Concurrency-oriented optimization for low-power asynchronous systems. ISLPED 1996: 151-156
14		Montek Singh, Steven M. Nowick: Synthesis-for-Initializability of Asynchronous Sequential Machines. ITC 1996: 232-241
1995
13	EE	Robert M. Fuhrer, Bill Lin, Steven M. Nowick: Algorithms for the optimal state assignment of asynchronous state machines. ARVLSI 1995: 59-75
12	EE	Peter A. Beerel, Kenneth Y. Yun, Steven M. Nowick, Pei-Chuan Yeh: Estimation and bounding of energy consumption in burst-mode control circuits. ICCAD 1995: 26-33
11	EE	Robert M. Fuhrer, Bill Lin, Steven M. Nowick: Symbolic hazard-free minimization and encoding of asynchronous finite state machines. ICCAD 1995: 604-611
10	EE	Steven M. Nowick, Niraj K. Jha, Fu-Chiung Cheng: Synthesis of asynchronous circuits for stuck-at and robust path delay fault testability. VLSI Design 1995: 171-176
9	EE	Steven M. Nowick, David L. Dill: Exact two-level minimization of hazard-free logic with multiple-input changes. IEEE Trans. on CAD of Integrated Circuits and Systems 14(8): 986-997 (1995)
1994
8		Steven M. Nowick, Bill Coates: UCLOCK: Automated Design of High-Peformance Unclocked State Machines. ICCD 1994: 434-441
7	EE	Ganesh Gopalakrishnan, Erik Brunvand, Nick Michell, Steven M. Nowick: A correctness criterion for asynchronous circuit validation and optimization. IEEE Trans. on CAD of Integrated Circuits and Systems 13(11): 1309-1318 (1994)
1992
6	EE	Steven M. Nowick, David L. Dill: Exact two-level minimization of hazard-free logic with multiple-input changes. ICCAD 1992: 626-630
5		Steven M. Nowick, Kenneth Y. Yun, David L. Dill: Practical Asynchronous Controller Design. ICCD 1992: 341-345
4		Kenneth Y. Yun, David L. Dill, Steven M. Nowick: Synthesis of 3D Asynchronous State Machines. ICCD 1992: 346-350
3		David L. Dill, Steven M. Nowick, Robert F. Sproull: Specification and Automatic Verification of Self-Timed Queues. Formal Methods in System Design 1(1): 29-60 (1992)
1991
2		Steven M. Nowick, David L. Dill: Automatic Synthesis of Locally-Clocked Asynchronous State Machines. ICCAD 1991: 318-321
1		Steven M. Nowick, David L. Dill: Synthesis of Asynchronous State Machines Using A Local Clock. ICCD 1991: 192-197

Coauthor Index

1	Melinda Y. Agyekum	[55]
2	Andrew Bardsley	[38]
3	Peter A. Beerel	[12] [23] [39]
4	Martin Benes	[24] [28]
5	Erik Brunvand	[7] [21] [30]
6	Tiberiu Chelcea	[32] [36] [37] [38] [40] [45]
7	Fu-Chiung Cheng	[10] [18]
8	Bill Coates	[8]
9	Edward G. Coffman Jr.	[48]
10	David L. Dill	[1] [2] [3] [4] [5] [6] [9]
11	Ayoob E. Dooply	[23]
12	Doug Edwards	[38]
13	Robert M. Fuhrer	[11] [13] [22] [29]
14	Ganesh Gopalakrishnan	[7] [16]
15	Soha Hassoun	[42]
16	Hans M. Jacobson	[16]
17	Cheoljoo Jeong	[46] [49] [56] [57]
18	Niraj K. Jha	[10] [18]
19	Anup Jose	[43]
20	Prabhakar Kudva	[16]
21	Yee William Li	[43]
22	Bill Lin	[11] [13]
23	Peggy B. McGee	[47] [48] [53]
24	William F. McLaughlin	[54]
25	Nick Michell	[7]
26	Amitava Mitra	[54]
27	Charles W. O'Donnell	[44]
28	Recep O. Ozdag	[39]
29	George Patounakis	[43]
30	Luis A. Plana	[15] [26]
31	Sergey Rylov	[41]
32	Alexander Rylyakov	[41]
33	Kenneth L. Shepard	[43]
34	Montek Singh	[14] [19] [31] [33] [34] [39] [41] [50] [51] [52]
35	Robert F. Sproull	[3]
36	Leon Stok	[42]
37	Michael Theobald	[17] [20] [25] [27] [35]
38	José A. Tierno	[41]
39	Andrew Wolfe	[24] [28]
40	Tao Wu	[17]
41	Pei-Chuan Yeh	[12]
42	Kenneth Y. Yun	[4] [5] [12] [21] [23] [30]

Colors in the list of coauthors