Teresa H. Y. Meng

2008
42	EE	Michael D. Linderman, Jamison D. Collins, Hong Wang, Teresa H. Y. Meng: Merge: a programming model for heterogeneous multi-core systems. ASPLOS 2008: 287-296
41	EE	Narges Bani Asadi, Teresa H. Y. Meng, Wing H. Wong: Reconfigurable computing for learning Bayesian networks. FPGA 2008: 203-211
2005
40	EE	Avneesh Agrawal, Jeffrey G. Andrews, John M. Cioffi, Teresa H. Y. Meng: Iterative power control for imperfect successive interference cancellation. IEEE Transactions on Wireless Communications 4(3): 878-884 (2005)
2004
39	EE	Rob A. Rutenbar, Anthony R. Bonaccio, Teresa H. Y. Meng, Ernesto Perea, Robert Pitts, Charles Sodini, Jim Wieser: Will Moore's Law rule in the land of analog? DAC 2004: 633
38	EE	Jeffrey G. Andrews, Teresa H. Y. Meng: Performance of multicarrier CDMA with successive interference cancellation in a multipath fading channel. IEEE Transactions on Communications 52(5): 811-822 (2004)
2003
37	EE	Rob A. Rutenbar, David L. Harame, Kurt Johnson, Paul Kempf, Teresa H. Y. Meng, Reza Rofougaran, James Spoto: Mixed signals on mixed-signal: the right next technology. DAC 2003: 278-279
2002
36	EE	Peter H. Chou, Teresa H. Y. Meng: Vertex Data Compression through Vector Quantization. IEEE Trans. Vis. Comput. Graph. 8(4): 373-382 (2002)
2001
35	EE	Peter H. Chou, Teresa H. Y. Meng: Fast Vertex Transformation for 3D Rendering through Predictive Vector Quantization. Data Compression Conference 2001: 491
2000
34		Jeff Y. F. Hsieh, André van der Avoird, Richard P. Kleihorst, Teresa H. Y. Meng: Transpose Memory for Video Rate JPEG Compression on Highly Parallel Single-Chip Digital CMOS Imager. ICIP 2000
33	EE	Sydney Reader, Won Namgoong, Teresa H. Y. Meng: Partitioning Analog and Digital Processing in Mixed-Signal Systems. VLSI Signal Processing 24(1): 59-65 (2000)
1999
32	EE	Koji Asari, Yukio Mitsuyama, Takao Onoye, Isao Shirakawa, Hiroshige Hirano, Toshiyuki Honda, Tatsuo Otsuki, Takaaki Baba, Teresa H. Y. Meng: FeRAM Circuit Technology for System on a Chip. Evolvable Hardware 1999: 193-
31	EE	Chris J. Myers, Tomas Rokicki, Teresa H. Y. Meng: POSET timing and its application to the synthesis and verification of gate-level timed circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 18(6): 769-786 (1999)
30	EE	Jeff Y. F. Hsieh, Teresa H. Y. Meng: Low-Power Parallel Video Compression Architecture for a Single-Chip Digital CMOS Camera. VLSI Signal Processing 21(3): 195-207 (1999)
1998
29	EE	Tony Verma, Teresa H. Y. Meng: A Scalable Entropy Code. Data Compression Conference 1998: 581
28	EE	Won Namgoong, Teresa H. Y. Meng: Power consumption of parallel spread spectrum correlator architectures. ISLPED 1998: 133-135
27		Teresa H. Y. Meng: Invited Address: A Wireless Portable Video-On-Demand System. VLSI Design 1998: 4-
26		Peter A. Beerel, Jerry R. Burch, Teresa H. Y. Meng: Checking Combinational Equivalence of Speed-Independent Circuits. Formal Methods in System Design 13(1): 37-85 (1998)
25	EE	Peter A. Beerel, Chris J. Myers, Teresa H. Y. Meng: Covering conditions and algorithms for the synthesis of speed-independent circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 17(3): 205-219 (1998)
24	EE	Andy C. Hung, Teresa H. Y. Meng: Multidimensional rotations for robust quantization of image data. IEEE Transactions on Image Processing 7(1): 1-12 (1998)
23	EE	Andy C. Hung, Ely K. Tsern, Teresa H. Y. Meng: Error-resilient pyramid vector quantization for image compression. IEEE Transactions on Image Processing 7(10): 1373-1386 (1998)
1997
22	EE	Takami Satonaka, Takaaki Baba, Tatsuo Otsuki, Takao Chikamura, Teresa H. Y. Meng: Object Recognition with Luminance, Rotation and Location Invariance. ICIP (3) 1997: 336-339
21	EE	Won Namgoong, Teresa H. Y. Meng: A Low-Power Encoder For Pyramid Vector Quantization of Subband Coefficients. VLSI Signal Processing 16(1): 9-23 (1997)
1996
20	EE	Antonio R. W. Todesco, Teresa H. Y. Meng: Symphony: A Simulation Backplane for Parallel Mixed-Mode Co-Simulation of VLSI Systems. DAC 1996: 149-154
19	EE	Benjamin M. Gordon, Ely K. Tsern, Teresa H. Y. Meng: Design of a low power video decompression chip set for portable applications. VLSI Signal Processing 13(2-3): 125-142 (1996)
1995
18	EE	Chris J. Myers, Tomas Rokicki, Teresa H. Y. Meng: Automatic synthesis of gate-level timed circuits with choice. ARVLSI 1995: 42-58
17	EE	Chris J. Myers, Peter A. Beerel, Teresa H. Y. Meng: Technology mapping of timed circuits. ASYNC 1995: 138-
16	EE	Sheila S. Hemami, Teresa H. Y. Meng: Transform coded image reconstruction exploiting interblock correlation. IEEE Transactions on Image Processing 5(7): 1023-1027 (1995)
15	EE	Wee-Chiew Tan, Teresa H. Y. Meng: A low-power high performance polygon renderer for computer graphics. VLSI Signal Processing 9(3): 233-255 (1995)
1994
14		Andy C. Hung, Teresa H. Y. Meng: Multidimensional Rotations for Quantization. Data Compression Conference 1994: 32-41
13		Andy C. Hung, Teresa H. Y. Meng: Error Resilient Pyramid Vector Quantization for Image Compression. ICIP (1) 1994: 583-587
12		Belle W. Y. Wei, Teresa H. Y. Meng: A Programmable Parallel Huffman Decoder. ICIP (3) 1994: 668-671
11		Navin Chaddha, Avneesh Agrawal, Anoop Gupta, Teresa H. Y. Meng: Variable Compression Using JPEG. ICMCS 1994: 562-569
10		Andy C. Hung, Teresa H. Y. Meng: A Comparison of Fast Inverse Discrete Cosine Transform Algorithms. Multimedia Syst. 2(5): 204-217 (1994)
9	EE	Teresa H. Y. Meng, Sharad Malik: Editorial. VLSI Signal Processing 7(1-2): 5-6 (1994)
1993
8		Andy C. Hung, Teresa H. Y. Meng: Adaptive Channel Optimization of Vector Quantized Data. Data Compression Conference 1993: 282-291
7	EE	Peter A. Beerel, Jerry R. Burch, Teresa H. Y. Meng: Efficient verification of determinate speed-independent circuits. ICCAD 1993: 261-267
6	EE	Chris J. Myers, Teresa H. Y. Meng: Synthesis of timed asynchronous circuits. IEEE Trans. VLSI Syst. 1(2): 106-119 (1993)
1992
5	EE	Peter A. Beerel, Teresa H. Y. Meng: Automatic gate-level synthesis of speed-independent circuits. ICCAD 1992: 581-586
4		Chris J. Myers, Teresa H. Y. Meng: Synthesis of Timed Asynchronous Circuits. ICCD 1992: 279-284
1991
3	EE	Peter A. Beerel, Teresa H. Y. Meng: Testability of Asynchronous Timed Control Circuits with Delay Assumptions. DAC 1991: 446-451
1990
2	EE	Teresa H. Y. Meng, Robert W. Brodersen, David G. Messerschmitt: A clock-free chip set for high-sampling rate adaptive filters. VLSI Signal Processing 1(4): 345-365 (1990)
1989
1	EE	Teresa H. Y. Meng, Robert W. Brodersen, David G. Messerschmitt: Automatic synthesis of asynchronous circuits from high-level specifications. IEEE Trans. on CAD of Integrated Circuits and Systems 8(11): 1185-1205 (1989)

Coauthor Index

1	Avneesh Agrawal	[11] [40]
2	Jeffrey G. Andrews	[38] [40]
3	Narges Bani Asadi	[41]
4	Koji Asari	[32]
5	André van der Avoird	[34]
6	Takaaki Baba	[22] [32]
7	Peter A. Beerel	[3] [5] [7] [17] [25] [26]
8	Anthony R. Bonaccio	[39]
9	Robert W. Brodersen	[1] [2]
10	Jerry R. Burch	[7] [26]
11	Navin Chaddha	[11]
12	Takao Chikamura	[22]
13	Peter H. Chou	[35] [36]
14	John M. Cioffi	[40]
15	Jamison D. Collins	[42]
16	Benjamin M. Gordon	[19]
17	Anoop Gupta	[11]
18	David L. Harame	[37]
19	Sheila S. Hemami	[16]
20	Hiroshige Hirano	[32]
21	Toshiyuki Honda	[32]
22	Jeff Y. F. Hsieh	[30] [34]
23	Andy C. Hung	[8] [10] [13] [14] [23] [24]
24	Kurt Johnson	[37]
25	Paul Kempf	[37]
26	Richard P. Kleihorst	[34]
27	Michael D. Linderman	[42]
28	Sharad Malik	[9]
29	David G. Messerschmitt	[1] [2]
30	Yukio Mitsuyama	[32]
31	Chris J. Myers	[4] [6] [17] [18] [25] [31]
32	Won Namgoong	[21] [28] [33]
33	Takao Onoye	[32]
34	Tatsuo Otsuki	[22] [32]
35	Ernesto Perea	[39]
36	Robert Pitts	[39]
37	Sydney Reader	[33]
38	Reza Rofougaran	[37]
39	Tomas Rokicki	[18] [31]
40	Rob A. Rutenbar	[37] [39]
41	Takami Satonaka	[22]
42	Isao Shirakawa	[32]
43	Charles Sodini	[39]
44	James Spoto	[37]
45	Wee-Chiew Tan	[15]
46	Antonio R. W. Todesco	[20]
47	Ely K. Tsern	[19] [23]
48	Tony Verma	[29]
49	Hong Wang	[42]
50	Belle W. Y. Wei	[12]
51	Jim Wieser	[39]
52	Wing H. Wong	[41]

Colors in the list of coauthors