2004 |
36 | | Jürgen Becker,
Marco Platzner,
Serge Vernalde:
Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings
Springer 2004 |
35 | EE | Vincent Nollet,
Théodore Marescaux,
Diederik Verkest,
Jean-Yves Mignolet,
Serge Vernalde:
Operating-system controlled network on chip.
DAC 2004: 256-259 |
34 | EE | Bingfeng Mei,
Serge Vernalde,
Diederik Verkest,
Rudy Lauwereins:
Design Methodology for a Tightly Coupled VLIW/Reconfigurable Matrix Architecture: A Case Study.
DATE 2004: 1224-1229 |
33 | EE | Andrei Bartic,
Dirk Desmet,
Jean-Yves Mignolet,
Théodore Marescaux,
Diederik Verkest,
Serge Vernalde,
Rudy Lauwereins,
J. Miller,
Frédéric Robert:
Network-on-Chip for Reconfigurable Systems: From High-Level Design Down to Implementation.
FPL 2004: 637-647 |
32 | EE | Théodore Marescaux,
Vincent Nollet,
Jean-Yves Mignolet,
Andrei Bartic,
W. Moffat,
Prabhat Avasare,
Paul Coene,
Diederik Verkest,
Serge Vernalde,
Rudy Lauwereins:
Run-time support for heterogeneous multitasking on reconfigurable SoCs.
Integration 38(1): 107-130 (2004) |
31 | EE | Javier Resano,
Diederik Verkest,
Daniel Mozos,
Serge Vernalde,
Francky Catthoor:
A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAs.
Microprocessors and Microsystems 28(5-6): 291-301 (2004) |
2003 |
30 | EE | Bingfeng Mei,
Serge Vernalde,
Diederik Verkest,
Hugo De Man,
Rudy Lauwereins:
Exploiting Loop-Level Parallelism on Coarse-Grained Reconfigurable Architectures Using Modulo Scheduling.
DATE 2003: 10296-10301 |
29 | EE | Jean-Yves Mignolet,
Vincent Nollet,
Paul Coene,
Diederik Verkest,
Serge Vernalde,
Rudy Lauwereins:
Infrastructure for Design and Management of Relocatable Tasks in a Heterogeneous Reconfigurable System-on-Chip.
DATE 2003: 10986-10993 |
28 | | Javier Resano,
Diederik Verkest,
Daniel Mozos,
Serge Vernalde,
Francky Catthoor:
Run-Time Scheduling for Multimedia Applications on Dynamically Reconfigurable Systems.
ESTImedia 2003: 156-162 |
27 | | Vincent Nollet,
Jean-Yves Mignolet,
Andrei Bartic,
Diederik Verkest,
Serge Vernalde,
Rudy Lauwereins:
Hierarchical Run-Time Reconfiguration Managed by an Operating System for Reconfigurable Systems.
Engineering of Reconfigurable Systems and Algorithms 2003: 81-87 |
26 | EE | Javier Resano,
Diederik Verkest,
Daniel Mozos,
Serge Vernalde,
Francky Catthoor:
Application of Task Concurrency Management on Dynamically Reconfigurable Hardware Platforms.
FCCM 2003: 278-279 |
25 | EE | Javier Resano,
Daniel Mozos,
Diederik Verkest,
Serge Vernalde,
Francky Catthoor:
Run-Time Minimization of Reconfiguration Overhead in Dynamically Reconfigurable Systems.
FPL 2003: 585-594 |
24 | EE | Théodore Marescaux,
Jean-Yves Mignolet,
Andrei Bartic,
W. Moffat,
Diederik Verkest,
Serge Vernalde,
Rudy Lauwereins:
Networks on Chip as Hardware Components of an OS for Reconfigurable Systems.
FPL 2003: 595-605 |
23 | EE | Bingfeng Mei,
Serge Vernalde,
Diederik Verkest,
Hugo De Man,
Rudy Lauwereins:
ADRES: An Architecture with Tightly Coupled VLIW Processor and Coarse-Grained Reconfigurable Matrix.
FPL 2003: 61-70 |
22 | EE | Vincent Nollet,
Paul Coene,
Diederik Verkest,
Serge Vernalde,
Rudy Lauwereins:
Designing an Operating System for a Heterogeneous Reconfigurable So.
IPDPS 2003: 174 |
21 | EE | Richard Stahl,
Robert Pasko,
Luc Rijnders,
Diederik Verkest,
Serge Vernalde,
Rudy Lauwereins,
Francky Catthoor:
Performance Analysis for Identification of (Sub-)Task-Level Parallelism in Java.
SCOPES 2003: 313-328 |
2002 |
20 | EE | Robert Pasko,
Serge Vernalde,
Patrick Schaumont:
Techniques to Evolve a C++ Based System Design Language.
DATE 2002: 302-309 |
19 | EE | Yajun Ha,
Radovan Hipik,
Serge Vernalde,
Diederik Verkest,
Marc Engels,
Rudy Lauwereins,
Hugo De Man:
Adding Hardware Support to the HotSpot Virtual Machine for Domain Specific Applications.
FPL 2002: 1135-1138 |
18 | EE | Théodore Marescaux,
Andrei Bartic,
Diederik Verkest,
Serge Vernalde,
Rudy Lauwereins:
Interconnection Networks Enable Fine-Grain Dynamic Multi-tasking on FPGAs.
FPL 2002: 795-805 |
17 | | Yajun Ha,
Serge Vernalde,
Patrick Schaumont,
Marc Engels,
Rudy Lauwereins,
Hugo De Man:
Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects.
The Journal of Supercomputing 21(2): 131-144 (2002) |
2001 |
16 | EE | Yajun Ha,
Geert Vanmeerbeeck,
Patrick Schaumont,
Serge Vernalde,
Marc Engels,
Rudy Lauwereins,
Hugo De Man:
Virtual Java/FPGA interface for networked reconfiguration.
ASP-DAC 2001: 558-563 |
15 | EE | Geert Vanmeerbeeck,
Patrick Schaumont,
Serge Vernalde,
Marc Engels,
Ivo Bolsens:
Hardware/software partitioning of embedded system in OCAPI-xl.
CODES 2001: 30-35 |
14 | EE | Yajun Ha,
Bingfeng Mei,
Patrick Schaumont,
Serge Vernalde,
Rudy Lauwereins,
Hugo De Man:
Development of a Design Framework for Platform-Independent Networked Reconfiguration of Software and Hardware.
FPL 2001: 264-274 |
2000 |
13 | EE | Yajun Ha,
Patrick Schaumont,
Marc Engels,
Serge Vernalde,
Freddy Potargent,
Luc Rijnders,
Hugo De Man:
A Hardware Virtual Machine for the Networked Reconfiguration.
IEEE International Workshop on Rapid System Prototyping 2000: 194-199 |
12 | | Yajun Ha,
Serge Vernalde,
Patrick Schaumont,
Marc Engels,
Hugo De Man:
Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects.
PDPTA 2000 |
1999 |
11 | EE | Patrick Schaumont,
Radim Cmar,
Serge Vernalde,
Marc Engels:
A 10 Mbit/s Upstream Cable Modem with Automatic equalization.
DAC 1999: 337-340 |
10 | EE | Patrick Schaumont,
Radim Cmar,
Serge Vernalde,
Marc Engels,
Ivo Bolsens:
Hardware Reuse at the Behavioral Level.
DAC 1999: 784-789 |
9 | EE | Radim Cmar,
Luc Rijnders,
Patrick Schaumont,
Serge Vernalde,
Ivo Bolsens:
A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement.
DATE 1999: 271- |
8 | EE | Robert Pasko,
Patrick Schaumont,
Veerle Derudder,
Serge Vernalde,
Daniela Durackova:
A new algorithm for elimination of common subexpressions.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(1): 58-68 (1999) |
1998 |
7 | EE | Patrick Schaumont,
Serge Vernalde,
Luc Rijnders,
Marc Engels,
Ivo Bolsens:
A Programming Environment for the Design of Complex High Speed ASICs.
DAC 1998: 315-320 |
6 | EE | Patrick Schaumont,
Geert Vanmeerbeeck,
E. Watzeels,
Serge Vernalde,
Marc Engels,
Ivo Bolsens:
A Technique for Combined Virtual Prototyping and Hardware Design.
International Workshop on Rapid System Prototyping 1998: 156-161 |
5 | EE | Patrick Schaumont,
Serge Vernalde,
Marc Engels,
Ivo Bolsens:
Low Power Digital Frequency Conversion Architectures.
VLSI Signal Processing 18(2): 187-197 (1998) |
1997 |
4 | EE | Radim Cmar,
Serge Vernalde:
Highly scalable parallel parametrizable architecture of the motion estimator.
ED&TC 1997: 208-212 |
3 | EE | Patrick Schaumont,
Serge Vernalde,
Luc Rijnders,
Marc Engels,
Ivo Bolsens:
Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications.
ED&TC 1997: 542-546 |
1996 |
2 | EE | Elisabeth Berrebi,
Polen Kission,
Serge Vernalde,
S. De Troch,
Jean-Claude Herluison,
Jean Fréhel,
Ahmed Amine Jerraya,
Ivo Bolsens:
Combined Control Flow Dominated and Data Flow Dominated High-Level Synthesis.
DAC 1996: 573-578 |
1994 |
1 | EE | Koen Van Nieuwenhove,
Kjell Cools,
D. Devisch,
Ivo Bolsens,
Serge Vernalde,
Kim Chansik,
R. B. W. Lee,
Oh Younguk:
ASIC synthesis of a flexible 80 Mbit/s Reed-Solomon Codec.
EURO-DAC 1994: 658-663 |