| 2008 | 
| 53 | EE | Michael B. Healy,
Fayez Mohamood,
Hsien-Hsin S. Lee,
Sung Kyu Lim:
A unified methodology for power supply noise reduction in modern microarchitecture design.
ASP-DAC 2008: 611-616 | 
| 52 | EE | Chinnakrishnan S. Ballapuram,
Ahmad Sharif,
Hsien-Hsin S. Lee:
Exploiting access semantics and program behavior to reduce snoop power in chip multiprocessors.
ASPLOS 2008: 60-69 | 
| 51 | EE | Vikas R. Vasisht,
Hsien-Hsin S. Lee:
SHARK: Architectural support for autonomic protection against stealth by rootkit exploits.
MICRO 2008: 106-116 | 
| 50 | EE | Richard M. Yoo,
Hsien-Hsin S. Lee:
Adaptive transaction scheduling for transactional memory systems.
SPAA 2008: 169-178 | 
| 49 | EE | Richard M. Yoo,
Yang Ni,
Adam Welc,
Bratin Saha,
Ali-Reza Adl-Tabatabai,
Hsien-Hsin S. Lee:
Kicking the tires of software transactional memory: why the going gets tough.
SPAA 2008: 265-274 | 
| 48 | EE | Fayez Mohamood,
Mrinmoy Ghosh,
Hsien-Hsin S. Lee:
DLL-conscious instruction fetch optimization for SMT processors.
Journal of Systems Architecture - Embedded Systems Design 54(12): 1089-1100 (2008) | 
| 2007 | 
| 47 | EE | Fayez Mohamood,
Michael B. Healy,
Sung Kyu Lim,
Hsien-Hsin S. Lee:
Noise-Direct: A Technique for Power Supply Noise Aware Floorplanning Using Microarchitecture Profiling.
ASP-DAC 2007: 786-791 | 
| 46 | EE | Weidong Shi,
Hsien-Hsin S. Lee:
Accelerating memory decryption and authentication with frequent value prediction.
Conf. Computing Frontiers 2007: 35-46 | 
| 45 | EE | Taeweon Suh,
Shih-Lien Lu,
Hsien-Hsin S. Lee:
An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems.
FPL 2007: 47-53 | 
| 44 | EE | Eric Fontaine,
Hsien-Hsin S. Lee:
Optimizing Katsevich image reconstruction algorithm on multicore processors.
ICPADS 2007: 1-8 | 
| 43 | EE | Mrinmoy Ghosh,
Hsien-Hsin S. Lee:
Virtual Exclusion: An architectural approach to reducing leakage energy in caches for multiprocessor systems.
ICPADS 2007: 1-8 | 
| 42 | EE | Mrinmoy Ghosh,
Hsien-Hsin S. Lee:
Smart Refresh: An Enhanced Memory Controller Design for Reducing Energy in Conventional and 3D Die-Stacked DRAMs.
MICRO 2007: 134-145 | 
| 41 | EE | Xiaotong Zhuang,
Hsien-Hsin S. Lee:
Reducing Cache Pollution via Dynamic Data Prefetch Filtering.
IEEE Trans. Computers 56(1): 18-31 (2007) | 
| 40 | EE | Michael B. Healy,
Mario Vittes,
Mongkol Ekpanyapong,
Chinnakrishnan S. Ballapuram,
Sung Kyu Lim,
Hsien-Hsin S. Lee,
Gabriel H. Loh:
Multiobjective Microarchitectural Floorplanning for 2-D and 3-D ICs.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(1): 38-52 (2007) | 
| 39 | EE | Weidong Shi,
Chenghuai Lu,
Hsien-Hsin S. Lee:
Memory-Centric Security Architecture.
T. HiPEAC 1: 95-115 (2007) | 
| 2006 | 
| 38 | EE | Mrinmoy Ghosh,
Emre Özer,
Stuart Biles,
Hsien-Hsin S. Lee:
Efficient System-on-Chip Energy Management with a Segmented Bloom Filter.
ARCS 2006: 283-297 | 
| 37 | EE | Dong Hyuk Woo,
Mrinmoy Ghosh,
Emre Özer,
Stuart Biles,
Hsien-Hsin S. Lee:
Reducing energy of virtual cache synonym lookup using bloom filters.
CASES 2006: 179-189 | 
| 36 | EE | Chinnakrishnan S. Ballapuram,
Kiran Puttaswamy,
Gabriel H. Loh,
Hsien-Hsin S. Lee:
Entropy-based low power data TLB design.
CASES 2006: 304-311 | 
| 35 | EE | Michael B. Healy,
Mario Vittes,
Mongkol Ekpanyapong,
Chinnakrishnan S. Ballapuram,
Sung Kyu Lim,
Hsien-Hsin S. Lee,
Gabriel H. Loh:
Microarchitectural floorplanning under performance and thermal tradeoff.
DATE 2006: 1288-1293 | 
| 34 | EE | Weidong Shi,
Joshua B. Fryman,
Guofei Gu,
Hsien-Hsin S. Lee,
Youtao Zhang,
Jun Yang:
InfoShield: a security architecture for protecting information usage in memory.
HPCA 2006: 222-231 | 
| 33 | EE | Richard M. Yoo,
Han Lee,
Kingsum Chow,
Hsien-Hsin S. Lee:
Constructing a Non-Linear Model with Neural Networks for Workload Characterization.
IISWC 2006: 150-159 | 
| 32 | EE | Weidong Shi,
Hsien-Hsin S. Lee,
Laura Falk,
Mrinmoy Ghosh:
An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors.
ISCA 2006: 102-113 | 
| 31 | EE | Weidong Shi,
Hsien-Hsin S. Lee:
Authentication Control Point and Its Implications For Secure Processor Design.
MICRO 2006: 103-112 | 
| 30 | EE | Fayez Mohamood,
Michael B. Healy,
Sung Kyu Lim,
Hsien-Hsin S. Lee:
A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design.
MICRO 2006: 3-14 | 
| 29 | EE | Lan Gao,
Jun Yang,
Marek Chrobak,
Youtao Zhang,
San Nguyen,
Hsien-Hsin S. Lee:
A low-cost memory remapping scheme for address bus protection.
PACT 2006: 74-83 | 
| 28 | EE | Mongkol Ekpanyapong,
Jacob R. Minz,
Thaisiri Watewai,
Hsien-Hsin S. Lee,
Sung Kyu Lim:
Profile-guided microarchitectural floor planning for deep submicron processor design.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(7): 1289-1300 (2006) | 
| 27 | EE | Chenghuai Lu,
Tao Zhang,
Weidong Shi,
Hsien-Hsin S. Lee:
M-TREE: A high efficiency security architecture for protecting integrity and privacy of software.
J. Parallel Distrib. Comput. 66(9): 1116-1128 (2006) | 
| 2005 | 
| 26 | EE | Martin Schulz,
Brian S. White,
Sally A. McKee,
Hsien-Hsin S. Lee,
Jürgen Jeitner:
Owl: next generation system monitoring.
Conf. Computing Frontiers 2005: 116-124 | 
| 25 | EE | Taeweon Suh,
Daehyun Kim,
Hsien-Hsin S. Lee:
Cache coherence support for non-shared bus architecture on heterogeneous MPSoCs.
DAC 2005: 553-558 | 
| 24 | EE | Weidong Shi,
Chenghuai Lu,
Hsien-Hsin S. Lee:
Memory-Centric Security Architecture.
HiPEAC 2005: 153-168 | 
| 23 | EE | Weidong Shi,
Hsien-Hsin S. Lee,
Guofei Gu,
Laura Falk,
Trevor N. Mudge,
Mrinmoy Ghosh:
An Intrusion-Tolerant and Self-Recoverable Network Service System Using A Security Enhanced Chip Multiprocessor.
ICAC 2005: 263-273 | 
| 22 | EE | Weidong Shi,
Hsien-Hsin S. Lee,
Mrinmoy Ghosh,
Chenghuai Lu,
Alexandra Boldyreva:
High Efficiency Counter Mode Security Architecture via Prediction and Precomputation.
ISCA 2005: 14-24 | 
| 21 | EE | Mongkol Ekpanyapong,
Chinnakrishnan S. Ballapuram,
Sung Kyu Lim,
Hsien-Hsin S. Lee:
Wire-driven microarchitectural design space exploration.
ISCAS (2) 2005: 1867-1870 | 
| 20 | EE | Chinnakrishnan S. Ballapuram,
Hsien-Hsin S. Lee,
Milos Prvulovic:
Synonymous address compaction for energy reduction in data TLB.
ISLPED 2005: 357-362 | 
| 19 | EE | Weidong Shi,
Hsien-Hsin S. Lee,
Chenghuai Lu,
Mrinmoy Ghosh:
Towards the issues in architectural support for protection of software execution.
SIGARCH Computer Architecture News 33(1): 6-15 (2005) | 
| 2004 | 
| 18 | EE | Mongkol Ekpanyapong,
Pinar Korkmaz,
Hsien-Hsin S. Lee:
Choice Predictor for Free.
Asia-Pacific Computer Systems Architecture Conference 2004: 399-413 | 
| 17 | EE | Xiaotong Zhuang,
Tao Zhang,
Hsien-Hsin S. Lee,
Santosh Pande:
Hardware assisted control flow obfuscation for embedded processors.
CASES 2004: 292-302 | 
| 16 | EE | Mongkol Ekpanyapong,
Jacob R. Minz,
Thaisiri Watewai,
Hsien-Hsin S. Lee,
Sung Kyu Lim:
Profile-guided microarchitectural floorplanning for deep submicron processor design.
DAC 2004: 634-639 | 
| 15 | EE | Taeweon Suh,
Douglas M. Blough,
Hsien-Hsin S. Lee:
Supporting Cache Coherence in Heterogeneous Multiprocessor Systems.
DATE 2004: 1150-1157 | 
| 14 | EE | Weidong Shi,
Hsien-Hsin S. Lee,
Chenghuai Lu,
Tao Zhang:
Attacks and risk analysis for hardware supported software copy protection systems.
Digital Rights Management Workshop 2004: 54-62 | 
| 13 | EE | Weidong Shi,
Hsien-Hsin S. Lee,
Mrinmoy Ghosh,
Chenghuai Lu:
Architectural Support for High Speed Protection of Memory Integrity and Confidentiality in Multiprocessor Systems.
IEEE PACT 2004: 123-134 | 
| 12 | EE | Taeweon Suh,
Hsien-Hsin S. Lee,
Douglas M. Blough:
Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 1.
IEEE Micro 24(4): 33-41 (2004) | 
| 11 | EE | Taeweon Suh,
Hsien-Hsin S. Lee,
Douglas M. Blough:
Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 2.
IEEE Micro 24(5): 70-78 (2004) | 
| 2003 | 
| 10 | EE | Mikhail Smelyanskiy,
Scott A. Mahlke,
Edward S. Davidson,
Hsien-Hsin S. Lee:
Predicate-Aware Scheduling: A Technique for Reducing Resource Constraints.
CGO 2003: 169-178 | 
| 9 | EE | Yuvraj Singh Dhillon,
Abdulkadir Utku Diril,
Abhijit Chatterjee,
Hsien-Hsin S. Lee:
Algorithm for Achieving Minimum Energy Consumption in CMOS Circuits Using Multiple Supply and Threshold Voltages at the Module Level.
ICCAD 2003: 693-700 | 
| 8 | EE | Xiaotong Zhuang,
Hsien-Hsin S. Lee:
A Hardware-based Cache Pollution Filtering Mechanism for Aggressive Prefetches.
ICPP 2003: 286-293 | 
| 7 | EE | Hsien-Hsin S. Lee,
Chinnakrishnan S. Ballapuram:
Energy efficient D-TLB and data cache using semantic-aware multilateral partitioning.
ISLPED 2003: 306-311 | 
| 6 | EE | Joshua B. Fryman,
Chad Huneycutt,
Hsien-Hsin S. Lee,
Kenneth M. Mackenzie,
David E. Schimmel:
Energy-Efficient Network Memory for Ubiquitous Devices.
IEEE Micro 23(5): 60-70 (2003) | 
| 2001 | 
| 5 | EE | Hsien-Hsin S. Lee,
Mikhail Smelyanskiy,
Chris J. Newburn,
Gary S. Tyson:
Stack Value File: Custom Microarchitecture for the Stack.
HPCA 2001: 5-14 | 
| 4 | EE | Hsien-Hsin S. Lee,
Gary S. Tyson,
Matthew K. Farrens:
Improving Bandwidth Utilization using Eager Writeback.
J. Instruction-Level Parallelism 3:  (2001) | 
| 2000 | 
| 3 | EE | Hsien-Hsin S. Lee,
Gary S. Tyson:
Region-based caching: an energy-delay efficient memory architecture for embedded processors.
CASES 2000: 120-127 | 
| 2 | EE | Hsien-Hsin S. Lee,
Gary S. Tyson,
Matthew K. Farrens:
Eager writeback - a technique for improving bandwidth utilization.
MICRO 2000: 11-21 | 
| 1994 | 
| 1 |   | Eric L. Boyd,
Waqar Azeem,
Hsien-Hsin S. Lee,
Tien-Pao Shih,
Shih-Hao Hung,
Edward S. Davidson:
A Hierarchical Approach to Modeling and Improving the Performance of Scientific Applications on the KSR1.
ICPP (3) 1994: 188-192 |