2008 |
17 | EE | Young-Su Kwon,
Bontae Koo,
Nak-Woong Eum:
Application-adaptive reconfiguration of memory address shuffler for FPGA-embedded instruction-set processor.
FPL 2008: 209-214 |
2005 |
16 | EE | Jae-Gon Lee,
Wooseung Yang,
Young-Su Kwon,
Young-Il Kim,
Chong-Min Kyung:
Simulation acceleration of transaction-level models for SoC with RTL sub-blocks.
ASP-DAC 2005: 499-502 |
15 | EE | Young-Su Kwon,
Payam Lajevardi,
Anantha P. Chandrakasan,
Frank Honoré,
Donald E. Troxel:
A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool.
SLIP 2005: 65-72 |
14 | EE | Young-Su Kwon,
Chong-Min Kyung:
Performance-driven event-based synchronization for multi-FPGA simulation accelerator with event time-multiplexing bus.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(9): 1444-1456 (2005) |
2004 |
13 | EE | Young-Su Kwon,
Jae-Gon Lee,
Chong-Min Kyung:
Bandwidth tracing arbitration algorithm for mixed-clock SoC with dynamic priority adaptation.
ASP-DAC 2004: 806-811 |
12 | EE | Young-Il Kim,
Woo-Seung Yang,
Young-Su Kwon,
Chong-Min Kyung:
Communication-efficient hardware acceleration for fast functional simulation.
DAC 2004: 293-298 |
11 | EE | Young-Su Kwon,
Young-Il Kim,
Chong-Min Kyung:
Systematic functional coverage metric synthesis from hierarchical temporal event relation graph.
DAC 2004: 45-48 |
10 | EE | Young-Su Kwon,
Chong-Min Kyung:
Functional Coverage Metric Generation from Temporal Event Relation Graph.
DATE 2004: 670-671 |
9 | EE | Young-Su Kwon,
Chong-Min Kyung:
Scheduling driven circuit partitioning algorithm for multiple FPGAs using time-multiplexed, off-chip, multi-casting interconnection architecture.
Microprocessors and Microsystems 28(5-6): 341-350 (2004) |
2003 |
8 | EE | Young-Su Kwon,
Bong-Il Park,
Chong-Min Kyung:
SCATOMi: Scheduling Driven Circuit Partitioning Algorithm for Multiple FPGAs using Time-multiplexed, Off-chip, Multicasting Interconnection Architecture.
ICCD 2003: 419-425 |
7 | | Young-Su Kwon,
Woo-Seung Yang,
Chong-Min Kyung:
Signal Scheduling Driven Circuit Partitioning for Multiple FPGAs with Time-multiplexed Interconnection.
VLSI-SOC 2003: 123-128 |
2000 |
6 | EE | Sang-Joon Nam,
Jun-Hee Lee,
Byoung-Woon Kim,
Yeon-Ho Im,
Young-Su Kwon,
Kyong-Gu Kang,
Chong-Min Kyung:
Fast development of source-level debugging system using hardware emulation (short paper).
ASP-DAC 2000: 401-404 |
5 | EE | Young-Su Kwon,
In-Cheol Park,
Chong-Min Kyung:
A hardware accelerator for the specular intensity of phong illumination model in 3-dimensional graphics.
ASP-DAC 2000: 559-564 |
4 | | Young-Su Kwon,
In-Cheol Park,
Chong-Min Kyung:
Pyramid Texture Compression and Decompression Using Interpolative Vector Quantization.
ICIP 2000 |
3 | EE | Jin-Hyuk Yang,
Byoung-Woon Kim,
Sang-Joon Nam,
Young-Su Kwon,
Dae-Hyun Lee,
Jong-Yeol Lee,
Chan-Soo Hwang,
Yong-Hoon Lee,
Seung Ho Hwang,
In-Cheol Park,
Chong-Min Kyung:
MetaCore: an application-specific programmable DSP development system.
IEEE Trans. VLSI Syst. 8(2): 173-183 (2000) |
1999 |
2 | EE | Young-Su Kwon,
Bong-Il Park,
In-Cheol Park,
Chong-Min Kyung:
A New Single-Clock Flip-Clop for Half-Swing Clocking.
ASP-DAC 1999: 117-120 |
1998 |
1 | EE | Jin-Hyuk Yang,
Byoung-Woon Kim,
Sang-Jun Nam,
Jang-Ho Cho,
Sung-Won Seo,
Chang-Ho Ryu,
Young-Su Kwon,
Dae-Hyun Lee,
Jong-Yeol Lee,
Jong-Sun Kim,
Hyun-Dhong Yoon,
Jae-Yeol Kim,
Kun-Moo Lee,
Chan-Soo Hwang,
In-Hyung Kim,
Jun Sung Kim,
Kwang-Il Park,
Kyu Ho Park,
Yong-Hoon Lee,
Seung Ho Hwang,
In-Cheol Park,
Chong-Min Kyung:
MetaCore: An Application Specific DSP Development System.
DAC 1998: 800-803 |