| 2008 |
|---|
| 11 | EE | Purnamrita Sarkar,
Andrew W. Moore,
Amit Prakash:
Fast incremental proximity search in large graphs.
ICML 2008: 896-903 |
| 10 | EE | Amit Prakash,
Adnan Aziz:
Binary Decision Graph.
Encyclopedia of Algorithms 2008 |
| 9 | EE | Amit Prakash,
Adnan Aziz:
Symbolic Model Checking.
Encyclopedia of Algorithms 2008 |
| 2006 |
|---|
| 8 | EE | Matthew Richardson,
Amit Prakash,
Eric Brill:
Beyond PageRank: machine learning for static ranking.
WWW 2006: 707-715 |
| 2004 |
|---|
| 7 | EE | Marghoob Mohiyuddin,
Amit Prakash,
Adnan Aziz,
Wayne Wolf:
Synthesizing interconnect-efficient low density parity check codes.
DAC 2004: 488-491 |
| 6 | EE | Amit Prakash,
Adnan Aziz,
Vijaya Ramachandran:
Randomized Parallel Schedulers for Switch-Memory-Switch Routers: Analysis and Numerical Studies.
INFOCOM 2004 |
| 2003 |
|---|
| 5 | EE | Adnan Aziz,
Amit Prakash,
Vijaya Ramachandran:
A near optimal scheduler for switch-memory-switch routers.
SPAA 2003: 343-352 |
| 4 | EE | Amit Prakash,
Ramakrishna Kotla,
Tanmoy Mandal,
Adnan Aziz:
A high-performance architecture and BDD-based synthesis methodology for packet classification.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(6): 698-709 (2003) |
| 2002 |
|---|
| 3 | EE | Amit Prakash,
Adnan Aziz:
A Middle Ground between CAMs and DAGs for High-Speed Packet Classification.
Hot Interconnects 2002: 89-94 |
| 2 | EE | Sadia Sharif,
Adnan Aziz,
Amit Prakash:
An O(log2N) parallel algorithm for output queuing.
INFOCOM 2002 |
| 1 | | Amit Prakash,
Ramakrishna Kotla,
Tanmoy Mandal,
Adnan Aziz:
A Reconfigurable Architecture and Associated Synthesis Methodology for High Speed Packet Classification.
IWLS 2002: 97-102 |
