2008 |
54 | EE | Jay B. Brockman,
Sheng Li,
Peter M. Kogge,
Amit Kashyap,
Mohammad Mojarradi:
Design of a mask-programmable memory/multiplier array using G4-FET technology.
DAC 2008: 337-338 |
53 | EE | Timothy J. Dysart,
Peter M. Kogge:
System Reliabilities When Using Triple Modular Redundancy in Quantum-Dot Cellular Automata.
DFT 2008: 72-80 |
52 | EE | Sheng Li,
Shannon K. Kuntz,
Peter M. Kogge,
Jay B. Brockman:
Memory model effects on application performance for a lightweight multithreaded architecture.
IPDPS 2008: 1-8 |
2007 |
51 | EE | Sarah E. Murphy,
Erik DeBenedictis,
Peter M. Kogge:
General floorplan for reversible quantum-dot cellular automata.
Conf. Computing Frontiers 2007: 77-82 |
50 | EE | Timothy J. Dysart,
Peter M. Kogge:
Probabilistic Analysis of a Molecular Quantum-Dot Cellular Automata Adder.
DFT 2007: 478-486 |
49 | EE | Sheng Li,
Amit Kashyap,
Shannon K. Kuntz,
Jay B. Brockman,
Peter M. Kogge,
Paul L. Springer,
Gary Block:
A Heterogeneous Lightweight Multithreaded Architecture.
IPDPS 2007: 1-8 |
48 | EE | Srinivas Sridharan,
Arun Rodrigues,
Peter M. Kogge:
Evaluating synchronization techniques for light-weight multithreaded/multicore architectures.
SPAA 2007: 57-58 |
47 | EE | Richard C. Murphy,
Peter M. Kogge:
On the Memory Access Patterns of Supercomputer Applications: Benchmark Selection and Its Implications.
IEEE Trans. Computers 56(7): 937-945 (2007) |
2006 |
46 | EE | Arun Rodrigues,
Kyle Wheeler,
Peter M. Kogge,
Keith D. Underwood:
Fine-Grained Message Pipelining for Improved MPI Performance.
CLUSTER 2006 |
45 | | James F. Kramer,
Matthias Scheutz,
Jay B. Brockman,
Peter M. Kogge:
Facing up to the Inevitable: Intelligent Error Recovery in Massively Parallel Processing in Memory Architectures.
PDPTA 2006: 227-233 |
44 | EE | Arun Rodrigues,
Richard C. Murphy,
Peter M. Kogge,
Keith D. Underwood:
Poster reception - The structural simulation toolkit: exploring novel architectures.
SC 2006: 157 |
43 | EE | Erik DeBenedictis,
David E. Keyes,
Peter M. Kogge:
M06 - Issues for the future of supercomputing: impact of Moore's law and architecture on application performance.
SC 2006: 220 |
42 | EE | Thomas L. Sterling,
Peter M. Kogge,
William J. Dally,
Steve Scott,
William Gropp,
David E. Keyes,
Peter H. Beckman:
Multi-core issues - Multi-Core for HPC: breakthrough or breakdown?
SC 2006: 73 |
2005 |
41 | EE | Craig S. Lent,
Sarah E. Frost,
Peter M. Kogge:
Reversible computation with quantum-dot cellular automata (QCA).
Conf. Computing Frontiers 2005: 403 |
40 | EE | Richard C. Murphy,
Arun Rodrigues,
Peter M. Kogge,
Keith D. Underwood:
The implications of working set analysis on supercomputing memory hierarchy design.
ICS 2005: 332-340 |
39 | EE | Alexei Kudriavtsev,
Peter M. Kogge:
Generation of permutations for SIMD processors.
LCTES 2005: 147-156 |
38 | EE | Danny Z. Chen,
Ovidiu Daescu,
John Hershberger,
Peter M. Kogge,
Ningfang Mi,
Jack Snoeyink:
Polygonal path simplification with angle constraints.
Comput. Geom. 32(3): 173-187 (2005) |
2004 |
37 | EE | Dominic A. Antonelli,
Danny Z. Chen,
Timothy J. Dysart,
Xiaobo Sharon Hu,
Andrew B. Kahng,
Peter M. Kogge,
Richard C. Murphy,
Michael T. Niemier:
Quantum-Dot Cellular Automata (QCA) circuit partitioning: problem modeling and solutions.
DAC 2004: 363-368 |
36 | EE | Michael T. Niemier,
Ramprasad Ravichandran,
Peter M. Kogge:
Using Circuits and Systems-Level Research to Drive Nanotechnology.
ICCD 2004: 302-309 |
35 | EE | Arun Rodrigues,
Richard C. Murphy,
Peter M. Kogge,
Keith D. Underwood:
Characterizing a new class of threads in scientific applications for high end supercomputers.
ICS 2004: 164-174 |
34 | EE | Timothy J. Dysart,
Branden J. Moore,
Lambert Schaelicke,
Peter M. Kogge:
Cache implications of aggressively pipelined high performance microprocessors.
ISPASS 2004: 123-132 |
33 | EE | Michael T. Niemier,
Peter M. Kogge:
The "4-Diamond Circuit" - A Minimally Complex Nano-Scale Computational Building Block in QCA.
ISVLSI 2004: 3-10 |
32 | EE | Jay B. Brockman,
Shyamkumar Thoziyoor,
Shannon K. Kuntz,
Peter M. Kogge:
A low cost, multithreaded processing-in-memory system.
WMPI 2004: 16-22 |
2003 |
31 | EE | Arun Rodrigues,
Richard C. Murphy,
Peter M. Kogge,
Jay B. Brockman,
Ron Brightwell,
Keith D. Underwood:
Implications of a PIM Architectural Model for MPI.
CLUSTER 2003: 259- |
30 | EE | Peter M. Kogge:
The State of State.
HPCA 2003: 266- |
29 | EE | Sarah E. Frost,
Arun Rodrigues,
Charles A. Giefer,
Peter M. Kogge:
Bouncing Threads: Merging a New Execution Model into a Nanotechnology Memory.
ISVLSI 2003: 19-28 |
28 | EE | Gary H. Bernstein,
Jay B. Brockman,
Peter M. Kogge,
Gregory L. Snider,
Barbara E. Walvoord:
From Bits to Chips: A Multidisciplinary Curriculum for Microelectronics System Design Education.
MSE 2003: 95-97 |
27 | EE | Dmitry V. Ponomarev,
Gurhan Kucuk,
Oguz Ergin,
Kanad Ghose,
Peter M. Kogge:
Energy-efficient issue queue design.
IEEE Trans. VLSI Syst. 11(5): 789-800 (2003) |
2002 |
26 | | Kanad Ghose,
Patrick H. Madden,
Vivek De,
Peter M. Kogge:
Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, New York, NY, USA, April 18-19, 2002
ACM 2002 |
2001 |
25 | | Lilia Yerosheva,
Shannon K. Kuntz,
Peter M. Kogge,
Jay B. Brockman:
A Microserver View of HTMT.
IPDPS 2001: 3 |
24 | EE | Michael T. Niemier,
Peter M. Kogge:
Exploring and exploiting wire-level pipelining in emerging technologies.
ISCA 2001: 166-177 |
23 | EE | Gurhan Kucuk,
Kanad Ghose,
Dmitry Ponomarev,
Peter M. Kogge:
Energy: efficient instruction dispatch buffer design for superscalar processors.
ISLPED 2001: 237-242 |
22 | | Shannon K. Kuntz,
Richard C. Murphy,
Michael T. Niemier,
Jesús A. Izaguirre,
Peter M. Kogge:
Petaflop Computing for Protein Folding.
PPSC 2001 |
21 | EE | Danny Z. Chen,
Ovidiu Daescu,
John Hershberger,
Peter M. Kogge,
Jack Snoeyink:
Polygonal path approximation with angle constraints.
SODA 2001: 342-343 |
20 | EE | Victor V. Zyuban,
Peter M. Kogge:
Inherently Lower-Power High-Performance Superscalar Architectures.
IEEE Trans. Computers 50(3): 268-285 (2001) |
2000 |
19 | EE | Michael T. Niemier,
Michael J. Kontz,
Peter M. Kogge:
A design of and design tools for a novel quantum dot based microprocessor.
DAC 2000: 227-232 |
18 | EE | Victor V. Zyuban,
Peter M. Kogge:
Optimization of high-performance superscalar architectures for energy efficiency.
ISLPED 2000: 84-89 |
17 | EE | Richard C. Murphy,
Peter M. Kogge,
Arun Rodrigues:
The Characterization of Data Intensive Memory Workloads on Distributed PIM Systems.
Intelligent Memory Systems 2000: 85-103 |
1999 |
16 | | Lilia Yerosheva,
Peter M. Kogge:
Prototyping Execution Models for HTMT Petaflop Machine in Java.
CANPC 1999: 32-46 |
15 | EE | Michael T. Niemier,
Peter M. Kogge:
Logic in Wire: Using Quantum Dots to Implement a Microprocessor.
Great Lakes Symposium on VLSI 1999: 118-121 |
14 | EE | Jay B. Brockman,
Peter M. Kogge,
Thomas L. Sterling,
Vincent W. Freeh,
Shannon K. Kuntz:
Microservers: a new memory semantics for massively parallel computing.
International Conference on Supercomputing 1999: 454-463 |
13 | EE | Victor V. Zyuban,
Peter M. Kogge:
Application of STD to latch-power estimation.
IEEE Trans. VLSI Syst. 7(1): 111-115 (1999) |
1998 |
12 | EE | Yi Tian,
Edwin Hsing-Mean Sha,
Chantana Chantrapornchai,
Peter M. Kogge:
Optimizing Data Scheduling on Processor-in-Memory Arrays.
IPPS/SPDP 1998: 57-61 |
11 | EE | Victor V. Zyuban,
Peter M. Kogge:
The energy complexity of register files.
ISLPED 1998: 305-310 |
1996 |
10 | EE | Kanad Ghose,
Kiran Raghavendra Desai,
Peter M. Kogge:
Using Method Lookup Caches and Register Windowing to Speed Up Dynamically-Bound Object-Oriented Applications.
EUROMICRO 1996: 441- |
1995 |
9 | EE | Peter M. Kogge,
Toshio Sunaga,
Hisatada Miyataka,
Koji Kitamura,
Eric Retter:
Combined DRAM and logic chip for massively parallel systems.
ARVLSI 1995: 4-16 |
1994 |
8 | | Peter M. Kogge:
EXECUBE - A New Architecture for Scalable MPPs.
ICPP (1) 1994: 77-84 |
7 | EE | Peter M. Kogge:
Preface.
IBM Journal of Research and Development 38(2): 115-116 (1994) |
1992 |
6 | | Peter M. Kogge:
Declarative Computing: A Technology Driver.
ARCS 1992: 1-17 |
1985 |
5 | EE | Peter M. Kogge:
Function-based computing and parallelism: A review.
Parallel Computing 2(3): 243-253 (1985) |
1982 |
4 | | Peter M. Kogge:
Am Architectural Trail to Threaded-Code Systems.
IEEE Computer 15(3): 22-32 (1982) |
1977 |
3 | | Peter M. Kogge:
The Microprogramming of Pipelined Processors.
ISCA 1977: 63-70 |
1974 |
2 | | Peter M. Kogge:
Parallel Solution of Recurrence Problems.
IBM Journal of Research and Development 18(2): 138-148 (1974) |
1973 |
1 | | Peter M. Kogge:
Maximal Rate Pipelined Solutions to Recurrance Problems.
ISCA 1973: 71-76 |