Andreas Gerstlauer

2008
18	EE	Gunar Schirner, Andreas Gerstlauer, Rainer Dömer: Automatic generation of hardware dependent software for MPSoCs from abstract system specifications. ASP-DAC 2008: 271-276
17	EE	Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Daniel Gajski, A. Nakamura, Dai Araki, Y. Nishihara: Specify-explore-refine (SER): from specification to implementation. DAC 2008: 586-591
16	EE	Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel Gajski: An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors. IEEE Trans. VLSI Syst. 16(4): 466-475 (2008)
2007
15		Achim Rettberg, Mauro Cesar Zanella, Rainer Dömer, Andreas Gerstlauer, Franz-Josef Rammig: Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30 - June 1, 2007, Irvine, CA, USA Springer 2007
14	EE	Gunar Schirner, Andreas Gerstlauer, Rainer Dömer: Abstract, Multifaceted Modeling of Embedded Processors for System Level Design. ASP-DAC 2007: 384-389
13	EE	Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski: An Interactive Design Environment for C-based High-Level Synthesis. IESS 2007: 135-144
12	EE	Gunar Schirner, Gautam Sachdeva, Andreas Gerstlauer, Rainer Dömer: Embedded Software Development in a System-Level Design Flow. IESS 2007: 289-298
11	EE	Andreas Gerstlauer, Dongwan Shin, Junyu Peng, Rainer Dömer, Daniel Gajski: Automatic Layer-Based Generation of System-On-Chip Bus Communication Models. IEEE Trans. on CAD of Integrated Circuits and Systems 26(9): 1676-1687 (2007)
2006
10	EE	Dongwan Shin, Andreas Gerstlauer, Junyu Peng, Rainer Dömer, Daniel D. Gajski: Automatic generation of transaction level models for rapid design space exploration. CODES+ISSS 2006: 64-69
2005
9	EE	Andreas Gerstlauer, Dongwan Shin, Rainer Dömer, Daniel D. Gajski: System-level communication modeling for network-on-chip synthesis. ASP-DAC 2005: 45-48
8	EE	Lukai Cai, Andreas Gerstlauer, Daniel Gajski: Multi-metric and multi-entity characterization of applications for early system design exploration. ASP-DAC 2005: 944-947
7	EE	Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski: Automatic network generation for system-on-chip communication design. CODES+ISSS 2005: 255-260
2004
6	EE	Lukai Cai, Andreas Gerstlauer, Daniel Gajski: Retargetable profiling for rapid, early system-level design space exploration. DAC 2004: 281-286
2003
5	EE	Haobo Yu, Andreas Gerstlauer, Daniel Gajski: RTOS scheduling in transaction level models. CODES+ISSS 2003: 31-36
4	EE	Andreas Gerstlauer, Haobo Yu, Daniel Gajski: RTOS Modeling for System Level Design. DATE 2003: 10130-10135
2002
3	EE	Rainer Dömer, Andreas Gerstlauer, Wolfgang Mueller: The Formal Execution Semantics of SpecC. ISSS 2002: 150-155
2	EE	Daniel Gajski, Andreas Gerstlauer: System-Level Abstraction Semantics. ISSS 2002: 231-236
2000
1		Achim Rettberg, Franz J. Rammig, Andreas Gerstlauer, Daniel Gajski, Wolfram Hardt, Bernd Kleinjohann: The Specification Language SpecC within the PARADISE Design Environment. DIPES 2000: 111-120

Coauthor Index

1	Dai Araki	[17]
2	Lukai Cai	[6] [8]
3	Rainer Dömer	[3] [7] [9] [10] [11] [12] [13] [14] [15] [16] [18]
4	Daniel Gajski (Daniel D. Gajski)	[1] [2] [4] [5] [6] [7] [8] [9] [10] [11] [13] [16] [17]
5	Wolfram Hardt	[1]
6	Bernd Kleinjohann	[1]
7	Wolfgang Mueller	[3]
8	A. Nakamura	[17]
9	Y. Nishihara	[17]
10	Junyu Peng	[10] [11] [17]
11	Franz-Josef Rammig (Franz J. Rammig)	[1] [15]
12	Achim Rettberg	[1] [15]
13	Gautam Sachdeva	[12]
14	Gunar Schirner	[12] [14] [18]
15	Dongwan Shin	[7] [9] [10] [11] [13] [16] [17]
16	Haobo Yu	[4] [5]
17	Mauro Cesar Zanella	[15]