ASP-DAC 2004:
Yokohama,
Japan
Masaharu Imai (Ed.):
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004.
IEEE 2004, ISBN 0-7803-8175-0 BibTeX
@proceedings{DBLP:conf/aspdac/2004,
editor = {Masaharu Imai},
title = {Proceedings of the 2004 Conference on Asia South Pacific Design
Automation: Electronic Design and Solution Fair 2004, Yokohama,
Japan, January 27-30, 2004},
booktitle = {ASP-DAC},
publisher = {IEEE},
year = {2004},
isbn = {0-7803-8175-0},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Keynote address
Selected European activities in SoC low power design methodologies and research networking
Floorplanning
Modeling for analog circuits
Behavioral synthesis
Delay test and BIST
- Kai Yang, Kwang-Ting Cheng, Li-C. Wang:
TranGen: a SAT-based ATPG for path-oriented transition faults.
92-97
Electronic Edition (ACM DL) BibTeX
- Xiang Lu, Zhuo Li, Wangqi Qiu, D. M. H. Walker, Weiping Shi:
Longest path selection for delay test under process variation.
98-103
Electronic Edition (ACM DL) BibTeX
- Rei-Fu Huang, Yan-Ting Lai, Yung-Fa Chou, Cheng-Wen Wu:
SRAM delay fault modeling and test algorithm development.
104-109
Electronic Edition (ACM DL) BibTeX
- Sukanta Das, Debdas Dey, Subhayan Sen, Biplab K. Sikdar, Parimal Pal Chaudhuri:
An efficient design of non-linear CA based PRPG for VLSI circuit testing.
110-112
Electronic Edition (ACM DL) BibTeX
- Andrew B. Kahng, Sherief Reda:
Combinatorial group testing methods for the BIST diagnosis problem.
113-116
Electronic Edition (ACM DL) BibTeX
Embedded tutorial + regular session:
embedded szstem applications
Placement
RF design methodology
- Zhao Li, Ravikanth Suravarapu, Roy Hartono, Sambuddha Bhattacharya, Kartikeya Mayaram, C.-J. Richard Shi:
CrtSmile: a CAD tool for CMOS RF transistor substrate modeling incorporating layout effects.
163-168
Electronic Edition (ACM DL) BibTeX
- Min Chu, David J. Allstot, Jeffrey M. Huard, Kim Y. Wong:
NSGA-based parasitic-aware optimization of a 5GHz low-noise VCO.
169-174
Electronic Edition (ACM DL) BibTeX
- Praveen Ghanta, Zheng Li, Jaijeet S. Roychowdhury:
Analytical expressions for phase noise eigenfunctions of LC oscillators.
175-180
Electronic Edition (ACM DL) BibTeX
- Makram M. Mansour, Mohammad M. Mansour, Amit Mehrotra:
Analysis of MOS cross-coupled LC-tank oscillators using short-channel device equations.
181-185
Electronic Edition (ACM DL) BibTeX
Practical issues in logic synthesis
- Ko Yoshikawa, Yasuhiko Hagihara, Keisuke Kanamaru, Yuichi Nakamura, Shigeto Inui, Takeshi Yoshimura:
Timing optimization by replacing flip-flops to latches.
186-191
Electronic Edition (ACM DL) BibTeX
- Hiroyuki Higuchi, Yusuke Matsunaga:
Enhancing the performance of multi-cycle path analysis in an industrial setting.
192-197
Electronic Edition (ACM DL) BibTeX
- Noureddine Chabini, Wayne Wolf:
An approach for reducing dynamic power consumption in synchronous sequential digital designs.
198-204
Electronic Edition (ACM DL) BibTeX
- Yen-Te Ho, TingTing Hwang:
Low power design using dual threshold voltage.
205-208
Electronic Edition (ACM DL) BibTeX
- Chang Woo Kang, Ali Iranli, Massoud Pedram:
Technology mapping and packing for coarse-grained, anti-fuse based FPGAs.
209-211
Electronic Edition (ACM DL) BibTeX
Effective test and diagnosis
- Ozgur Sinanoglu, Alex Orailoglu:
Efficient RT-level fault diagnosis methodology.
212-217
Electronic Edition (ACM DL) BibTeX
- Alexander Smith, Andreas G. Veneris, Anastasios Viglas:
Design diagnosis using Boolean satisfiability.
218-223
Electronic Edition (ACM DL) BibTeX
- Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya:
Testable design of GRM network with EXOR-tree for detecting stuck-at and bridging faults.
224-229
Electronic Edition (ACM DL) BibTeX
- Terumine Hayashi, Haruna Yoshioka, Tsuyoshi Shinogi, Hidehiko Kita, Haruhiko Takase:
Test data compression technique using selective don't-care identification.
230-233
Electronic Edition (ACM DL) BibTeX
- Seongmoon Wang, Srimat T. Chakradhar, Kedarnath J. Balakrishnan:
Re-configurable embedded core test protocol.
234-237
Electronic Edition (ACM DL) BibTeX
System-level design methodology
- C. Schulz-Key, Markus Winterholer, Thomas Schweizer, Tommy Kuhn, Wolfgang Rosenstiel:
Object-oriented modeling and synthesis of SystemC specifications.
238-243
Electronic Edition (ACM DL) BibTeX
- Robertas Damasevicius, Vytautas Stuikys:
Application of UML for hardware design based on design process model.
244-249
Electronic Edition (ACM DL) BibTeX
- Yuichiro Miyaoka, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki:
A cosynthesis algorithm for application specific processors with heterogeneous datapaths.
250-255
Electronic Edition (ACM DL) BibTeX
- Michiaki Muraoka, Hiroaki Nishi, Rafael K. Morizawa, Hideaki Yokota, Hideyuki Hamada:
Design methodology for SoC arthitectures based on reusable virtual cores.
256-262
Electronic Edition (ACM DL) BibTeX
Advanced design and modeling techniques
- Makoto Mori, Hongyu Chen, Bo Yao, Chung-Kuan Cheng:
A multiple level network approach for clock skew minimization with process variations.
263-268
Electronic Edition (ACM DL) BibTeX
- Shang-Wei Tu, Jing-Yang Jou, Yao-Wen Chang:
Layout techniques for on-chip interconnect inductance reduction.
269-273
Electronic Edition (ACM DL) BibTeX
- Zhong Wang, Jianwen Zhu:
Piecewise quadratic waveform matching with successive chord iteration.
274-279
Electronic Edition (ACM DL) BibTeX
- Hsu-Wei Huang, Cheng-Yeh Wang, Jing-Yang Jou:
Optimal design of high fan-in multiplexers via mixed-integer nonlinear programming.
280-283
Electronic Edition (ACM DL) BibTeX
- Woopyo Jeong, Bipul Chandra Paul, Kaushik Roy:
Adaptive supply voltage technique for low swing interconnects.
284-287
Electronic Edition (ACM DL) BibTeX
Analog design and evaluation
- Kyeong-Sik Min, Young-Hee Kim, Daejeong Kim, Dong Myeong Kim, Jin-Hong Ahn:
A large-current-output boosted voltage generator with non-overlapping clock control for sub-1-V memory applications.
288-291
Electronic Edition (ACM DL) BibTeX
- Jianhua Gan, Shouli Yan, Jacob A. Abraham:
Effects of noise and nonlinearity on the calibration of a non-binary capacitor array in a successive approximation analog-to-digital converter.
292-297
Electronic Edition (ACM DL) BibTeX
- Chee-Kian Ong, Dongwoo Hong, Kwang-Ting Cheng, Li-C. Wang:
Jitter spectral extraction for multi-gigahertz signal.
298-303
Electronic Edition (ACM DL) BibTeX
- Quoc-Hoang Duong, Sang-Gug Lee:
A 35 dB-linear exponential function generator for VGA and AGC applications.
304-306
Electronic Edition (ACM DL) BibTeX
- Simon C. Li, Vincent Chia-Chang Lin:
A high efficiency 0.5W BTL class-D audio amplifier with RWDM technique.
307-309
Electronic Edition (ACM DL) BibTeX
System design verification
Opportunities with the open architecture test system
C-based design examples
Buffered tree construction
Power-aware approach for microprocessor design
- Kugan Vivekanandarajah, Thambipillai Srikanthan, Saurav Bhattacharyya:
Decode filter cache for energy efficient instruction cache hierarchy in super scalar architectures.
373-379
Electronic Edition (ACM DL) BibTeX
- Venkata Syam P. Rapaka, Emil Talpes, Diana Marculescu:
Mixed-clock issue queue design for energy aware, high-performance cores.
380-383
Electronic Edition (ACM DL) BibTeX
- G. Surendra, Subhasis Banerjee, S. K. Nandy:
Power-performance trade-off using pipeline delays.
384-386
Electronic Edition (ACM DL) BibTeX
- Subhasis Banerjee, G. Surendra, S. K. Nandy:
Exploiting program execution phases to trade power and performance for media workload.
387-389
Electronic Edition (ACM DL) BibTeX
- Subhasis Bhattacharjee, Dhiraj K. Pradhan:
LPRAM: a low power DRAM with testability.
390-393
Electronic Edition (ACM DL) BibTeX
Analog layout techniques
- Nuttorn Jangkrajarng, Sambuddha Bhattacharya, Roy Hartono, C.-J. Richard Shi:
Multiple specifications radio-frequency integrated circuit design with automatic template-driven layout retargeting.
394-399
Electronic Edition (ACM DL) BibTeX
- Sambuddha Bhattacharya, Nuttorn Jangkrajarng, Roy Hartono, C.-J. Richard Shi:
Hierarchical extraction and verification of symmetry constraints for analog layout automation.
400-405
Electronic Edition (ACM DL) BibTeX
- Takashi Nojima, Xiaoke Zhu, Yasuhiro Takashima, Shigetoshi Nakatake, Yoji Kajitani:
Multi-level placement with circuit schema based clustering in analog IC layouts.
406-411
Electronic Edition (ACM DL) BibTeX
Formal verification
Routing methodology
Exploration for advanced SoC design
Embedded software
RF modeling and design methodology
Power grid analysis and design
- Haifeng Qian, Sachin S. Sapatnekar:
Hierarchical random-walk algorithms for power grid analysis.
499-504
Electronic Edition (ACM DL) BibTeX
- Jingjing Fu, Zuying Luo, Xianlong Hong, Yici Cai, Sheldon X.-D. Tan, Zhu Pan:
A fast decoupling capacitor budgeting algorithm for robust on-chip power delivery.
505-510
Electronic Edition (ACM DL) BibTeX
- Chieki Mizuta, Jiro Iwai, Ken Machida, Tetsuro Kage, Hiroo Masuda:
Large-scale linear circuit simulation with an inversed inductance matrix.
511-516
Electronic Edition (ACM DL) BibTeX
- Atsushi Kurokawa, Nobuto Ono, Tetsuro Kage, Hiroo Masuda:
DEPOGIT: dense power-ground interconnect architecture for physical design integrity.
517-522
Electronic Edition (ACM DL) BibTeX
University design contest
- Yusuke Oike, Makoto Ikeda, Kunihiro Asada:
Design of real-time VGA 3-D image sensor using mixed-signal techniques.
523-524
Electronic Edition (ACM DL) BibTeX
- Kun-Bin Lee, Nelson Yen-Chung Chang, Hao-Yun Chin, Hui-Cheng Hsu, Chein-Wei Jen:
A bandwidth and memory efficient MPEG-4 shape encoder.
525-526
Electronic Edition (ACM DL) BibTeX
- Yuki Kuroda, Junichi Miyakoshi, Masayuki Miyama, Kousuke Imamura, Hideo Hashimoto, Masahiko Yoshimoto:
A sub-mW MPEG-4 motion estimation processor core for mobile video application.
527-528
Electronic Edition (ACM DL) BibTeX
- Kimihiro Nishio, Hiroo Yonezu, Shinya Sawa, Yuzo Furukawa:
Analog LSI for motion detection of approaching object with simple-shape recognition based on lower animal vision.
529-530
Electronic Edition (ACM DL) BibTeX
- Takashi Morimoto, Yohmei Harada, Tetsushi Koide, Hans Jürgen Mattausch:
350nm CMOS test-chip for architecture verification of real-time QVGA color-video segmentation at the 90nm technology node.
531-532
Electronic Edition (ACM DL) BibTeX
- Ramchan Woo, Sungdae Choi, Ju-Ho Sohn, Seong-Jun Song, Young-Don Bae, Hoi-Jun Yoo:
A low-power graphics LSI integrating 29Mb embedded DRAM for mobile multimedia applications.
533-534
Electronic Edition (ACM DL) BibTeX
- Simon C. Li, Vincent Chia-Chang Lin:
A high efficiency 0.5W BTL class-D audio amplifier with RWDM technique.
535-536
Electronic Edition (ACM DL) BibTeX
- Naoto Miyamoto, Leo Karnan, Kazuyuki Maruo, Koji Kotani, Tadahiro Ohmi:
A small-area high-performance 512-point 2-dimensional FFT single-chip processor.
537-538
Electronic Edition (ACM DL) BibTeX
- Dongsheng Ma, Wing-Hung Ki, Chi-Ying Tsui:
Fast adaptive DC-DC conversion using dual-loop one-cycle control in standard digital CMOS process.
539-540
Electronic Edition (ACM DL) BibTeX
- Yoshihiro Utsurogi, Masaki Haruoka, Toshimasa Matsuoka, Kenji Taniguchi:
A dual-band image-reject mixer for GPS with 64dB image rejection.
541-542
Electronic Edition (ACM DL) BibTeX
- Yuji Yano, Tetsushi Koide, Hans Jürgen Mattausch:
Associative memory with fully parallel nearest-Manhattan-distance search for low-power real-time single-chip applications.
543-544
Electronic Edition (ACM DL) BibTeX
- Takahito Miyazaki, Masanori Hashimoto, Hidetoshi Onodera:
A performance comparison of PLLs for clock generation using ring oscillator VCO and LC oscillator in a digital CMOS process.
545-546
Electronic Edition (ACM DL) BibTeX
- Yi-Ming Wang, Jinn-Shyan Wang:
A reliable low-power fast skew-compensation circuit.
547-548
Electronic Edition (ACM DL) BibTeX
- Jun Ohta, Tetsuo Furumiya, David C. Ng, Akihiro Uehara, Keiichiro Kagawa, Takashi Tokuda, Masahiro Nunoshita:
A retinal prosthetic device using a pulse-frequency-modulation CMOS image sensor.
549-550
Electronic Edition (ACM DL) BibTeX
- Tetsuya Sueyoshi, Hiroshi Uchida, Hans Jürgen Mattausch, Tetsushi Koide, Yosuke Mitani, Tetsuo Hironaka:
Compact 12-port multi-bank register file test-chip in 0.35µm CMOS for highly parallel processors.
551-552
Electronic Edition (ACM DL) BibTeX
- Chun-Pong Yu, Chiu-sing Choy, Hao Min, Cheong-fat Chan, Kong-Pang Pun:
A low power asynchronous Java processor for contactless smart card.
553-554
Electronic Edition (ACM DL) BibTeX
- Keiichiro Kagawa, Tomoaki Kawakami, Hiroaki Asazu, Takashi Ikeuchi, Akiko Fujiuchi, Jun Ohta, Masahiro Nunoshita:
An image-sensor-based optical receiver fabricated in a standard 0.35-µm CMOS technology for free-space optical communications.
555-556
Electronic Edition (ACM DL) BibTeX
- Takeshi Ohkawa, Toshiyuki Nozawa, Masanori Fujibayashi, Naoto Miyamoto, Leo Karnan, Soichiro Kita, Koji Kotani, Tadahiro Ohmi:
The flexible processor an approach for single-chip hardware emulation by dynamic reconfiguration.
557-558
Electronic Edition (ACM DL) BibTeX
- Martin Yeung-Kei Chui, Wing-Hung Ki, Chi-Ying Tsui:
A dual--band switching digital controller for a buck converter.
561-562
Electronic Edition (ACM DL) BibTeX
- Arunkumar Balasundaram, Angelo Pereira, Jun-Cheol Park, Vincent John Mooney III:
Golay and wavelet error control codes in VLSI.
563-564
Electronic Edition (ACM DL) BibTeX
- Kae-Jiun Mo, Shao-Sheng Yang, Tsin-Yuan Chang:
Timing measurement unit with multi-stage TVC for embedded memories.
565-566
Electronic Edition (ACM DL) BibTeX
- J. Y. Yeom, T. Ishitsu, H. Takahashi:
Development of a waveform sampling front-end ASIC for PET.
567-568
Electronic Edition (ACM DL) BibTeX
- Ryozo Katoh, Shin-ya Kobayashi, Takao Waho:
A dynamic element matching circuit for multi-bit delta-sigma modulators.
569-570
Electronic Edition (ACM DL) BibTeX
- Yoshihiro Iida, Naohiko Shimizu:
Design of POP-11 (PDP-11 on programmable chip).
571-572
Electronic Edition (ACM DL) BibTeX
- Ekachai Leelarasmee, Kanitpong Pengwon:
A closed caption TV microcontroller.
573-574
Electronic Edition (ACM DL) BibTeX
- Jun Ohta, Keiichiro Kagawa, Koichi Yamamoto, Takashi Tokuda, Yu Oya, Masahiro Nunoshita:
Improvement of saturation characteristics of a frequency-demodulation CMOS image sensor.
575-576
Electronic Edition (ACM DL) BibTeX
- Hala A. Farouk, Magdy Saeb:
Design and implementation of a secret key steganographic micro-architecture employing FPGA.
577-578
Electronic Edition (ACM DL) BibTeX
Novel techniques in logic synthesis
Future of ITS technologies in the ubiquitous society
Buffer planning
- Weiping Shi, Zhuo Li, Charles J. Alpert:
Complexity analysis and speedup techniques for optimal buffer insertion with minimum cost.
609-614
Electronic Edition (ACM DL) BibTeX
- Song Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Yici Cai, Chung-Kuan Cheng, Jun Gu:
A buffer planning algorithm with congestion optimization.
615-620
Electronic Edition (ACM DL) BibTeX
- Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Yici Cai, Chung-Kuan Cheng, Jun Gu:
Buffer allocation algorithm with consideration of routing congestion.
621-623
Electronic Edition (ACM DL) BibTeX
- Yi-Hui Cheng, Yao-Wen Chang:
Integrating buffer planning with floorplanning for simultaneous multi-objective optimization.
624-627
Electronic Edition (ACM DL) BibTeX
Design verification and simulation
Task scheduling with DVS
- Lap-Fai Leung, Chi-Ying Tsui, Wing-Hung Ki:
Minimizing energy consumption of multiple-processors-core systems with simultaneous task allocation, scheduling and voltage assignment.
647-652
Electronic Edition (ACM DL) BibTeX
- Dongkun Shin, Jihong Kim:
Dynamic voltage scaling of periodic and aperiodic tasks in priority-driven systems.
653-658
Electronic Edition (ACM DL) BibTeX
- Bita Gorjiara, Pai H. Chou, Nader Bagherzadeh, Mehrdad Reshadi, David Jensen:
Fast and efficient voltage scheduling by evolutionary slack distribution.
659-662
Electronic Edition (ACM DL) BibTeX
- Lap-Fai Leung, Chi-Ying Tsui, Wing-Hung Ki:
Minimizing energy consumption of hard real-time systems with simultaneous tasks scheduling and voltage assignment using statistical data.
663-665
Electronic Edition (ACM DL) BibTeX
Global routing
- Lerong Cheng, Xiaoyu Song, Guowu Yang, Zhiwei Tang:
A fast congestion estimator for routing with bounded detours.
666-670
Electronic Edition (ACM DL) BibTeX
- Zion Cien Shen, Chris C. N. Chu:
Accurate and efficient flow based congestion estimation in floorplanning.
671-676
Electronic Edition (ACM DL) BibTeX
- Jingyu Xu, Xianlong Hong, Tong Jing, Ling Zhang, Jun Gu:
A coupling and crosstalk considered timing-driven global routing algorithm for high performance circuit design.
677-682
Electronic Edition (ACM DL) BibTeX
- Jin-Tai Yan, Shun-Hua Lin:
Timing-constrained congestion-driven global routing.
683-686
Electronic Edition (ACM DL) BibTeX
- Qi Zhu, Hai Zhou, Tong Jing, Xianlong Hong, Yang Yang:
Efficient octilinear Steiner tree construction based on spanning graphs.
687-690
Electronic Edition (ACM DL) BibTeX
Interconnect and ESD extraction
- Akira Tsuchiya, Masanori Hashimoto, Hidetoshi Onodera:
Representative frequency for interconnect R(f)L(f)C extraction.
691-696
Electronic Edition (ACM DL) BibTeX
- Tao Jiang, Eric Pettus, Daksh Lehther:
A mixed-mode extraction flow for high performance microprocessors.
697-701
Electronic Edition (ACM DL) BibTeX
- Liu Yang, Xiaobo Guo, Zeyi Wang:
An efficient method MEGCR for solving systems with multiple right-hand sides in 3-D parasitic inductance extraction.
702-706
Electronic Edition (ACM DL) BibTeX
- Xiren Wang, Deyan Liu, Wenjian Yu, Zeyi Wang:
Fast and accurate extraction of 3-D interconnect resistance: improved quasi-multiple medium accelerated BEM method.
707-709
Electronic Edition (ACM DL) BibTeX
- Rouying Zhan, Haigang Feng, Qiong Wu, Xiaokang Guan, Guang Chen, Haolu Xie, Albert Z. Wang:
Concept and extraction method of ESD-critical parameters for function-based layout-level ESD protection circuit design verification.
710-712
Electronic Edition (ACM DL) BibTeX
Reconfigurable systems
- Jason Helge Anderson, Farid N. Najm:
Interconnect capacitance estimation for FPGAs.
713-718
Electronic Edition (ACM DL) BibTeX
- Chi-Chou Kao, Yen-Tai Lai:
Area-minimal algorithm for LUT-based FPGA technology mapping with duplication-free restriction.
719-724
Electronic Edition (ACM DL) BibTeX
- Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang, Hsin-Lung Chen:
Temporal floorplanning using 3D-subTCG.
725-730
Electronic Edition (ACM DL) BibTeX
- Yasunori Osana, Tomonori Fukushima, Hideharu Amano:
ReCSiP: a reconfigurable cell simulation platform: accelerating biological applications with FPGA.
731-733
Electronic Edition (ACM DL) BibTeX
- Young-Il Kim, Bong-Il Park, Jae-Gon Lee, Chong-Min Kyung:
SmartGlue: an interface controller with auto reconfiguration for field programmable computing machine.
734-736
Electronic Edition (ACM DL) BibTeX
HW/SW co-design
- Yoichi Yuyama, Masao Aramoto, Kazutoshi Kobayashi, Hidetoshi Onodera:
An SoC architecture and its design methodology using unifunctional heterogeneous processor array.
737-742
Electronic Edition (ACM DL) BibTeX
- Nozomu Togawa, Koichi Tachikake, Yuichiro Miyaoka, Masao Yanagisawa, Tatsuo Ohtsuki:
Instruction set and functional unit synthesis for SIMD processor cores.
743-750
Electronic Edition (ACM DL) BibTeX
- Ruibing Lu, Cheng-Kok Koh:
A high performance bus communication architecture through bus splitting.
751-755
Electronic Edition (ACM DL) BibTeX
- Dongwan Shin, Samar Abdi, Daniel Gajski:
Automatic generation of bus functional models from transaction level models.
756-758
Electronic Edition (ACM DL) BibTeX
- Hua Wang, Antonis Papanikolaou, Miguel Miranda, Francky Catthoor:
A global bus power optimization methodology for physical design of memory dominated systems by coupling bus segmentation and activity driven block placement.
759-761
Electronic Edition (ACM DL) BibTeX
DFM in Nm-process generation
Advanced interconnect analysis
Future reconfigurable computing system
System-level architecture
Embedded system architectures
- Tom Vander Aa, Murali Jayapala, Francisco Barat, Geert Deconinck, Rudy Lauwereins, Francky Catthoor, Henk Corporaal:
Instruction buffering exploration for low energy VLIWs with instruction clusters.
824-829
Electronic Edition (ACM DL) BibTeX
- Hidenori Sato, Toshinori Sato:
A static and dynamic energy reduction technique for I-cache and BTB in embedded processors.
830-833
Electronic Edition (ACM DL) BibTeX
- Meeyoung Cha, Chun-Gi Lyuh, Taewhan Kim:
Resource-constrained low-power bus encoding with crosstalk delay elimination.
834-837
Electronic Edition (ACM DL) BibTeX
- Markus Lorenz, Peter Marwedel, Thorsten Dräger, Gerhard Fettweis, Rainer Leupers:
Compiler based exploration of DSP energy savings by SIMD operations.
838-841
Electronic Edition (ACM DL) BibTeX
- Yuki Kobayashi, Shinsuke Kobayashi, Koji Okuda, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
Synthesizable HDL generation method for configurable VLIW processors.
842-845
Electronic Edition (ACM DL) BibTeX
Crosstalk noise analysis
Expressions for Boolean functions
- Rüdiger Ebendt, Wolfgang Günther, Rolf Drechsler:
Minimization of the expected path length in BDDs based on local changes.
865-870
Electronic Edition (ACM DL) BibTeX
- Shinobu Nagayama, Tsutomu Sasao:
Minimization of memory size for heterogeneous MDDs.
871-874
Electronic Edition (ACM DL) BibTeX
- Rüdiger Ebendt, Wolfgang Günther, Rolf Drechsler:
Combining ordered best-first search with branch and bound for exact BDD minimization.
875-878
Electronic Edition (ACM DL) BibTeX
- Ruiming Li, Dian Zhou, Donglei Du:
Satisfiability and integer programming as complementary tools.
879-882
Electronic Edition (ACM DL) BibTeX
- Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah:
ShatterPB: symmetry-breaking for pseudo-Boolean formulas.
883-886
Electronic Edition (ACM DL) BibTeX
Semi-custom techniques in system design
Copyright © Sat May 16 22:58:45 2009
by Michael Ley (ley@uni-trier.de)
