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Santanu Chattopadhyay

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2009
36EEAjit Pal, Santanu Chattopadhyay: Synthesis & Testing for Low Power. VLSI Design 2009: 37-38
2008
35EESantanu Kundu, Santanu Chattopadhyay: Mesh-of-tree deterministic routing for network-on-chip architecture. ACM Great Lakes Symposium on VLSI 2008: 343-346
34EEMayur Bubna, Naresh Shenoy, Santanu Chattopadhyay: An efficient greedy approach to PLA folding. ISCAS 2008: 1356-1359
33EERafiahamed Shaik, Mrityunjoy Chakraborty, Santanu Chattopadhyay: An efficient finite precision realization of the block adaptive decision feedback equalizer. ISCAS 2008: 1910-1913
32EETapas K. Maiti, Santanu Chattopadhyay: Don't care filling for power minimization in VLSI circuit testing. ISCAS 2008: 2637-2640
31EESambhu Nath Pradhan, M. Tilak Kumar, Santanu Chattopadhyay: Integrated Power-Gating and State Assignment for Low Power FSM Synthesis. ISVLSI 2008: 269-274
2007
30EEChandan Giri, Dilip Kumar Reddy Tipparthi, Santanu Chattopadhyay: Genetic Algorithm Based Approach for Hierarchical SOC Test Scheduling. ICCTA 2007: 141-145
29EEChandan Giri, B. Mallikarjuna Rao, Santanu Chattopadhyay: Test Data Compression by Spilt-VIHC (SVIHC). ICCTA 2007: 146-150
28EEChandan Giri, Soumojit Sarkar, Santanu Chattopadhyay: Test Scheduling for Core-Based SOCs Using Genetic Algorithm Based Heuristic Approach. ICIC (2) 2007: 1032-1041
27EEChandan Giri, Santanu Chattopadhyay: Reducing Test-bus Power Consumption in Huffman Coding Based Test Data Compression for SOCs. ISCAS 2007: 3679-3682
26EEChandan Giri, Soumojit Sarkar, Santanu Chattopadhyay: A genetic algorithm based heuristic technique for power constrained test scheduling in core-based SOCs. VLSI-SoC 2007: 320-323
2005
25EEShantanu Gupta, Tarang Vaish, Santanu Chattopadhyay: Flip-flop chaining architecture for power-efficient scan during test application. Asian Test Symposium 2005: 410-413
24EESantanu Chattopadhyay, Manas Kumar Dewangan: A Combinational Logic Mapper for Actel's SX/AX Family. VLSI Design 2005: 669-672
23EESantanu Chattopadhyay: Area Conscious State Assignment with Flip-Flop and Output Polarity Selection for Finite State Machine Synthesis?A Genetic Algorithm Approach. Comput. J. 48(4): 443-450 (2005)
2004
22EEBatsayan Das, Dipankar Sarkar, Santanu Chattopadhyay: Model checking on state transition diagram. ASP-DAC 2004: 412-417
21EED. Satyanarayana, Santanu Chattopadhyay, Jakki Sasidhar: Low Power Combinational Circuit Synthesis targeting Multiplexer based FPGAs. VLSI Design 2004: 79-84
2003
20EESantanu Chattopadhyay, K. Sudarsana Reddy: Genetic Algorithm based Test Scheduling and Test Access Mechanism Design for System-on-Chips. VLSI Design 2003: 341-346
19EESantanu Chattopadhyay, Naveen Choudhary: Genetic Algorithm based Approach for Low Power Combinational Circuit Testing. VLSI Design 2003: 552-
18EERohit Pandey, Santanu Chattopadhyay: Low Power Technology Mapping for LUT based FPGA "A Genetic Algorithm Approach". VLSI Design 2003: 79-84
2002
17EESantanu Chattopadhyay: Efficient Circuit Specific Pseudoexhaustive Testing with Cellular Automata. Asian Test Symposium 2002: 188-193
2001
16EEDebabrata Bagchi, Dipanwita Roy Chowdhury, Joy Mukherjee, Santanu Chattopadhyay: A Novel Strategy to Test Core Based Designs. VLSI Design 2001: 122-127
15EEPrabir Dasgupta, Santanu Chattopadhyay, Parimal Pal Chaudhuri, Indranil Sengupta: Cellular Automata-Based Recursive Pseudoexhaustive Test Pattern Generator. IEEE Trans. Computers 50(2): 177-185 (2001)
2000
14EEPrabir Dasgupta, Santanu Chattopadhyay, Indranil Sengupta: An ASIC for Cellular Automata Based Message Authentication. VLSI Design 2000: 538-
13EEPrabir Dasgupta, Santanu Chattopadhyay, Indranil Sengupta: Cellular Automata Based Deterministic Test Sequence Generator for Sequential Circuits. VLSI Design 2000: 544-549
1998
12EEKolin Paul, A. Roy, Prasanta Kumar Nandi, B. N. Roy, M. Deb Purkayastha, Santanu Chattopadhyay, Parimal Pal Chaudhuri: Theory and Application of Multiple Attractor Cellular Automata for Fault Diagnosis. Asian Test Symposium 1998: 388-
11 Santanu Chattopadhyay, Parimal Pal Chaudhuri: Genetic Algorithm Based Approach for Integrated State Assignment and Flipflop Selection in Finite State Machine Synthesis. VLSI Design 1998: 522-527
10 Santanu Chattopadhyay, Parimal Pal Chaudhuri: Efficient Signatures with Linear Space Complexity for Detecting Boolean Function Equivalence. VLSI Design 1998: 564-
9 Santanu Chattopadhyay, Dipanwita Roy Chowdhury, Subarna Bhattacharjee, Parimal Pal Chaudhuri: Cellular-Automata-Array-Based Diagnosis of Board Level Faults. IEEE Trans. Computers 47(8): 817-828 (1998)
1997
8EESantanu Chattopadhyay, Parimal Pal Chaudhuri: Parallel Decoder for Cellular Automata Based Byte Error Correcting Code. VLSI Design 1997: 527-528
7EESantanu Chattopadhyay, Samir Roy, Parimal Pal Chaudhuri: KGPMIN: an efficient multilevel multioutput AND-OR-XOR minimizer. IEEE Trans. on CAD of Integrated Circuits and Systems 16(3): 257-265 (1997)
1996
6EESantanu Chattopadhyay, S. Mitra, Parimal Pal Chaudhuri: Cellular automata based architecture of a database query processor. VLSI Design 1996: 320-321
5EES. Nandi, Santanu Chattopadhyay, Parimal Pal Chaudhuri: Programmable cellular automata based testbed for fault diagnosis in VLSI circuits. VLSI Design 1996: 61-64
4 Santanu Chattopadhyay, Samir Roy, Parimal Pal Chaudhuri: Synthesis of Highly Testable Fixed-Polarity AND-XOR Canonical Networks-A Genetic Algorithm-Based Approach. IEEE Trans. Computers 45(4): 487-490 (1996)
3 Koppolu Sasidhar, Santanu Chattopadhyay, Parimal Pal Chaudhuri: CAA Decoder for Cellular Automata Based Byte Error Correcting Code. IEEE Trans. Computers 45(9): 1003-1016 (1996)
1995
2EESantanu Chattopadhyay, Dipanwita Roy Chowdhury, Subarna Bhattacharjee, Parimal Pal Chaudhuri: Board level fault diagnosis using cellular automata array. VLSI Design 1995: 343-348
1EESantanu Chattopadhyay, Samir Roy, Parimal Pal Chaudhuri: Technology mapping on a multi-output logic module built around Cellular Automata Array for a new FPGA architecture. VLSI Design 1995: 57-62

Coauthor Index

1Debabrata Bagchi [16]
2Subarna Bhattacharjee [2] [9]
3Mayur Bubna [34]
4Mrityunjoy Chakraborty [33]
5Parimal Pal Chaudhuri [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [15]
6Naveen Choudhary [19]
7Dipanwita Roy Chowdhury [2] [9] [16]
8Batsayan Das [22]
9Prabir Dasgupta [13] [14] [15]
10Manas Kumar Dewangan [24]
11Chandan Giri [26] [27] [28] [29] [30]
12Shantanu Gupta [25]
13M. Tilak Kumar [31]
14Santanu Kundu [35]
15Tapas K. Maiti [32]
16S. Mitra [6]
17Joy Mukherjee [16]
18Prasanta Kumar Nandi [12]
19S. Nandi [5]
20Ajit Pal [36]
21Rohit Pandey [18]
22Kolin Paul [12]
23Sambhu Nath Pradhan [31]
24M. Deb Purkayastha [12]
25B. Mallikarjuna Rao [29]
26K. Sudarsana Reddy [20]
27A. Roy [12]
28B. N. Roy [12]
29Samir Roy [1] [4] [7]
30Dipankar Sarkar [22]
31Soumojit Sarkar [26] [28]
32Jakki Sasidhar [21]
33Koppolu Sasidhar [3]
34D. Satyanarayana [21]
35Indranil Sengupta [13] [14] [15]
36Rafiahamed Shaik [33]
37Naresh Shenoy [34]
38Dilip Kumar Reddy Tipparthi [30]
39Tarang Vaish [25]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)