| 2009 |
|---|
| 88 | EE | Siew Kei Lam,
Thambipillai Srikanthan:
Rapid design of area-efficient custom instructions for reconfigurable embedded processing.
Journal of Systems Architecture - Embedded Systems Design 55(1): 1-14 (2009) |
| 2008 |
|---|
| 87 | EE | Santanu Kumar Dash,
Thambipillai Srikanthan:
Rapid estimation of instruction cache hit rates using loop profiling.
ASAP 2008: 263-268 |
| 86 | EE | George Rosario Jagadeesh,
Siew Kei Lam,
Thambipillai Srikanthan:
A Short Course on Implementing FPGA Based Digital Systems.
ICPADS 2008: 741-744 |
| 85 | EE | Abhijit Ray,
Wu Jigang,
Thambipillai Srikanthan:
Performance Estimation: IPC.
ICYCS 2008: 189-193 |
| 84 | EE | Wu Jigang,
Thambipillai Srikanthan,
Kai Wang:
Finding minimum interconnect sub-arrays in reconfigurable VLSI arrays.
ISCAS 2008: 1352-1355 |
| 83 | EE | Xiongfei Liao,
Wu Jigang,
Thambipillai Srikanthan:
A temperature-aware virtual submesh allocation scheme for noc-based manycore chips.
SPAA 2008: 182-184 |
| 82 | EE | Ji-Gang Wu,
Thambipillai Srikanthan,
Guang-Wei Zou:
New Model and Algorithm for Hardware/Software Partitioning.
J. Comput. Sci. Technol. 23(4): 644-651 (2008) |
| 81 | EE | Dipnarayan Guha,
Thambipillai Srikanthan:
Compiler Back End Design for Translating Multi-radio Descriptions to Operating System-less Asynchronous Processor Datapaths.
JCP 3(1): 7-14 (2008) |
| 80 | EE | Ji-Gang Wu,
Thambipillai Srikanthan,
Chengbin Yan:
Algorithmic aspects for power-efficient hardware/software partitioning.
Mathematics and Computers in Simulation 79(4): 1204-1215 (2008) |
| 2007 |
|---|
| 79 | EE | Xiongfei Liao,
Wu Jigang,
Thambipillai Srikanthan:
Temperature-Aware Submesh Allocation Scheme for Heat Balancing on Chip-Multiprocessors.
ASAP 2007: 228-233 |
| 78 | EE | Siew Kei Lam,
Thambipillai Srikanthan:
Estimating Area Costs of Custom Instructions for FPGA-based Reconfigurable Processors.
ASAP 2007: 89-94 |
| 77 | EE | Dipnarayan Guha,
Thambipillai Srikanthan:
Reconfigurable Frame Parser Design for Multi-Radio Support on Asynchronous Microprocessor Cores.
ICCTA 2007: 122-127 |
| 76 | EE | Ian McLoughlin,
Douglas L. Maskell,
Thambipillai Srikanthan,
Wooi-Boon Goh:
An Embedded Systems graduate education for Singapore.
ICPADS 2007: 1-5 |
| 75 | EE | Wu Jigang,
Thambipillai Srikanthan,
Guang Chen:
One-dimensional Search Algorithms for Hardware/Software Partitioning.
MEMOCODE 2007: 149-158 |
| 74 | EE | Wu Jigang,
Thambipillai Srikanthan,
Xiaodong Wang:
Integrated Row and Column Rerouting for Reconfiguration of VLSI Arrays with Four-Port Switches.
IEEE Trans. Computers 56(10): 1387-1400 (2007) |
| 73 | EE | Gayathri Venkataraman,
Sabu Emmanuel,
Thambipillai Srikanthan:
Size-restricted cluster formation and cluster maintenance technique for mobile ad hoc networks.
Int. Journal of Network Management 17(2): 171-194 (2007) |
| 2006 |
|---|
| 72 | EE | Wu Jigang,
Thambipillai Srikanthan,
Xiaodong Wang:
New Reconfiguration Algorithm for Degradable VLSI Arrays.
APCCAS 2006: 1152-1155 |
| 71 | EE | Yi Wang,
Douglas L. Maskell,
Jussipekka Leiwo,
Thambipillai Srikanthan:
Unified Signed-Digit Number Adder for RSA and ECC Public-key Cryptosystems.
APCCAS 2006: 1655-1658 |
| 70 | EE | Yi Wang,
Jussipekka Leiwo,
Thambipillai Srikanthan,
Luo Jianwen:
An Efficient Algorithm for DPA-resistent RSA.
APCCAS 2006: 1659-1662 |
| 69 | EE | Wu Jigang,
Thambipillai Srikanthan:
Efficient Algorithms for Hardware/Software Partitioning to Minimize Hardware Area.
APCCAS 2006: 1875-1878 |
| 68 | EE | Siew Kei Lam,
Mohammed Shoaib,
Thambipillai Srikanthan:
Modeling Arbitrator Delay-Area Dependencies in Customizable Instruction Set Processors.
DELTA 2006: 237-242 |
| 67 | EE | Leipo Yan,
Siew Kei Lam,
Thambipillai Srikanthan,
Wu Jigang:
Energy Efficient Cache Tuning with Performance Bound.
DELTA 2006: 97-100 |
| 66 | EE | Ravi Kumar Satzoda,
Suchitra Sathyanarayana,
Thambipillai Srikanthan:
Low Area-time Complexity Averaging Scheme for Thumbnail Generation.
ICARCV 2006: 1-4 |
| 65 | EE | Kugan Vivekanandarajah,
Thambipillai Srikanthan,
Christopher T. Clarke:
Profile Directed Instruction Cache Tuning for Embedded Systems.
ISVLSI 2006: 277-282 |
| 64 | EE | Yi Wang,
Jussipekka Leiwo,
Thambipillai Srikanthan,
Yu Yu:
FPGA based DPA-resistant Unified Architecture for Signcryption.
ITNG 2006: 571-572 |
| 63 | EE | Leipo Yan,
Thambipillai Srikanthan,
Niu Gang:
Area and delay estimation for FPGA implementation of coarse-grained reconfigurable architectures.
LCTES 2006: 182-188 |
| 62 | EE | Wu Jigang,
Thambipillai Srikanthan:
Reconfiguration Algorithms for Power Efficient VLSI Subarrays with Four-Port Switches.
IEEE Trans. Computers 55(3): 243-253 (2006) |
| 61 | EE | Wu Jigang,
Thambipillai Srikanthan:
Low-complex dynamic programming algorithm for hardware/software partitioning.
Inf. Process. Lett. 98(2): 41-46 (2006) |
| 60 | EE | Wu Jigang,
Thambipillai Srikanthan:
An efficient algorithm for the collapsing knapsack problem.
Inf. Sci. 176(12): 1739-1751 (2006) |
| 59 | EE | Siew Kei Lam,
Thambipillai Srikanthan,
Christopher T. Clarke:
Rapid generation of custom instructions using predefined dataflow structures.
Microprocessors and Microsystems 30(6): 355-366 (2006) |
| 58 | EE | Wu Jigang,
Thambipillai Srikanthan:
Algorithmic aspects of area-efficient hardware/software partitioning.
The Journal of Supercomputing 38(3): 223-235 (2006) |
| 2005 |
|---|
| 57 | | Thambipillai Srikanthan,
Jingling Xue,
Chip-Hong Chang:
Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005, Proceedings
Springer 2005 |
| 56 | EE | Siew Kei Lam,
Deng Yun,
Thambipillai Srikanthan:
Morphable Structures for Reconfigurable Instruction Set Processors.
Asia-Pacific Computer Systems Architecture Conference 2005: 450-463 |
| 55 | EE | Wu Jigang,
Thambipillai Srikanthan,
Chengbin Yan:
Minimizing Power in Hardware/Software Partitioning.
Asia-Pacific Computer Systems Architecture Conference 2005: 580-588 |
| 54 | EE | Wu Jigang,
Thambipillai Srikanthan,
Heiko Schröder:
Efficient Techniques and Hardware Analysis for Mesh-Connected Processors.
ICA3PP 2005: 442-446 |
| 53 | EE | Kugan Vivekanandarajah,
Thambipillai Srikanthan:
Custom Instruction Filter Cache Synthesis for Low-Power Embedded Systems.
IEEE International Workshop on Rapid System Prototyping 2005: 151-157 |
| 52 | EE | Bin Cao,
Chip-Hong Chang,
Thambipillai Srikanthan:
A new formulation of fast diminished-one multioperand modulo 2/sup n/+1 adder.
ISCAS (1) 2005: 656-659 |
| 51 | EE | Bin Cao,
Thambipillai Srikanthan,
Chip-Hong Chang:
A new design method to modulo 2/sup n/-1 squaring.
ISCAS (1) 2005: 664-667 |
| 50 | EE | Yi Wang,
Jussipekka Leiwo,
Thambipillai Srikanthan:
Efficient high radix modular multiplication for high-speed computing in re-configurable hardware [cryptographic applications].
ISCAS (2) 2005: 1226-1229 |
| 49 | EE | Chip-Hong Chang,
Shibu Menon,
Bin Cao,
Thambipillai Srikanthan:
A configurable dual moduli multi-operand modulo adder.
ISCAS (2) 2005: 1630-1633 |
| 48 | EE | Abhijit Ray,
Thambipillai Srikanthan,
Wu Jigang:
Practical Techniques for Performance Estimation of Processors.
IWSOC 2005: 308-311 |
| 47 | EE | Wu Jigang,
Thambipillai Srikanthan,
Heiko Schröder:
Efficient reconfigurable techniques for VLSI arrays with 6-port switches.
IEEE Trans. VLSI Syst. 13(8): 976-979 (2005) |
| 46 | EE | Wu Jigang,
Thambipillai Srikanthan:
Power Efficient Sub-Array in Reconfigurable VLSI Meshes.
J. Comput. Sci. Technol. 20(5): 647-653 (2005) |
| 45 | EE | Siew Kei Lam,
K. Sridharan,
Thambipillai Srikanthan:
VLSI-efficient schemes for high-speed construction of tangent graph.
Robotics and Autonomous Systems 51(4): 248-260 (2005) |
| 2004 |
|---|
| 44 | EE | Kugan Vivekanandarajah,
Thambipillai Srikanthan,
Saurav Bhattacharyya:
Decode filter cache for energy efficient instruction cache hierarchy in super scalar architectures.
ASP-DAC 2004: 373-379 |
| 43 | EE | Wu Jigang,
Thambipillai Srikanthan:
Finding High Performance Solution in Reconfigurable Mesh-Connected VLSI Arrays.
Asia-Pacific Computer Systems Architecture Conference 2004: 440-448 |
| 42 | EE | Kugan Vivekanandarajah,
Thambipillai Srikanthan,
Saurav Bhattacharyya:
Dynamic Filter Cache for Low Power Instruction Memory Hierarchy.
DSD 2004: 607-610 |
| 41 | | Suchitra Sathyanarayana,
Siew Kei Lam,
Thambipillai Srikanthan:
High-throughput image rotation using sign-prediction based redundant cordic algorithm.
ICIP 2004: 2833-2836 |
| 40 | | Bin Cao,
Thambipillai Srikanthan,
Chip-Hong Chang:
Design of residue-to-binary converter for a new 5-moduli superset residue number system.
ISCAS (2) 2004: 841-844 |
| 39 | | Wu Jigang,
Thambipillai Srikanthan:
Fast reconfiguring mesh-connected VLSI arrays.
ISCAS (2) 2004: 949-952 |
| 38 | EE | Abhijit Ray,
Wu Jigang,
Thambipillai Srikanthan:
Knapsack Model and Algorithm for HW/SW Partitioning Problem.
International Conference on Computational Science 2004: 200-205 |
| 37 | | Abhijit Ray,
Wu Jigang,
Thambipillai Srikanthan:
Knapsack Model and Algorithm for Hardware/Software Partitioning Problem.
Computers and Artificial Intelligence 23(5): (2004) |
| 36 | EE | Thambipillai Srikanthan,
Siew Kei Lam,
Mishra Suman:
Area-Time Efficient Sign Detection Technique for Binary Signed-Digit Number System.
IEEE Trans. Computers 53(1): 69-72 (2004) |
| 35 | EE | Wu Jigang,
Thambipillai Srikanthan:
An efficient data structure for branch-and-bound algorithm.
Inf. Sci. 167(1-4): 233-237 (2004) |
| 2003 |
|---|
| 34 | | Kugan Vivekanandarajah,
Thambipillai Srikanthan,
Christopher T. Clarke,
Saurav Bhattacharyya:
Static Pattern Predictor (SPP) Based Low Power Instruction Cache Design.
Embedded Systems and Applications 2003: 210-215 |
| 33 | | Pramod K. Meher,
Thambipillai Srikanthan,
M. Mahesh Kumar,
S. Arunkumar:
Low-Power Transform-Domain Coding by Separable Two-Dimensional Hartley-Like Transform.
Embedded Systems and Applications 2003: 228-236 |
| 32 | | Wu Jigang,
Thambipillai Srikanthan,
Chandni R. Patel:
A Low Power Algorithm for Reconfigurable VLSI/WSI Arrays.
Embedded Systems and Applications 2003: 237-242 |
| 31 | EE | K. H. Quek,
Siew Kei Lam,
N. K. Agrawal,
Thambipillai Srikanthan:
Architectural design and analysis toolbox to implement shortest path algorithms in hardware.
ISCAS (3) 2003: 224-227 |
| 30 | EE | H. Tian,
Siew Kei Lam,
Thambipillai Srikanthan:
Implementing Otsu's thresholding process using area-time efficient logarithmic approximation unit.
ISCAS (4) 2003: 21-24 |
| 29 | EE | Bin Cao,
Thambipillai Srikanthan,
Chip-Hong Chang:
Design of a high speed reverse converter for a new 4-moduli set residue number system.
ISCAS (4) 2003: 520-523 |
| 28 | EE | Bin Cao,
Chip-Hong Chang,
Thambipillai Srikanthan:
New efficient residue-to-binary converters for 4-moduli set {2/sup n/ - 1, 2/sup n/, 2/sup n/ + 1, 2/sup n+1/ - 1}.
ISCAS (4) 2003: 536-539 |
| 27 | EE | Siew Kei Lam,
Devendra K. Chaudhaiy,
Thambipillai Srikanthan:
Low cost logarithmic techniques for high-precision computations.
ISCAS (5) 2003: 125-128 |
| 26 | EE | Wu Jigang,
Thambipillai Srikanthan:
Partial rerouting algorithm for reconfigurable VLSI arrays.
ISCAS (5) 2003: 641-644 |
| 25 | EE | Kugan Vivekanandarajah,
Thambipillai Srikanthan,
Saurav Bhattacharyya,
Prasanna Venkatesh Kannan:
Incorporating Pattern Prediction Technique for Energy Efficient Filter Cache Design.
IWSOC 2003: 44-47 |
| 24 | EE | Wu Jigang,
Thambipillai Srikanthan:
On the Reconfiguration Algorithm for Fault-Tolerant VLSI Arrays.
International Conference on Computational Science 2003: 360-366 |
| 23 | EE | Wu Jigang,
Thambipillai Srikanthan:
A Run-time Reconfiguration Algorithm for VLSI Arrays.
VLSI Design 2003: 567-572 |
| 22 | EE | Wu Jigang,
Thambipillai Srikanthan:
An improved reconfiguration algorithm for degradable VLSI/WSI arrays.
Journal of Systems Architecture 49(1-2): 23-31 (2003) |
| 2002 |
|---|
| 21 | EE | H. Tian,
Siew Kei Lam,
Thambipillai Srikanthan,
Chip-Hong Chang:
An efficient architecture for adaptive progressive thresholding.
APCCAS (1) 2002: 513-516 |
| 20 | EE | C. S. Lim,
Thambipillai Srikanthan,
Vijayan K. Asari,
Siew Kei Lam:
Fuzzy-ART based image compression for hardware implementation.
APCCAS (2) 2002: 147-150 |
| 19 | EE | Chip-Hong Chang,
Rui Xiao,
Thambipillai Srikanthan:
A MSB-biased self-organizing feature map for still color image compression.
APCCAS (2) 2002: 85-88 |
| 18 | EE | Wu Jigang,
Heiko Schröder,
Thambipillai Srikanthan:
New Architecture and Algorithms for Degradable VLSI/WSI Arrays.
COCOON 2002: 181-190 |
| 17 | EE | Rui Xiao,
Chip-Hong Chang,
Thambipillai Srikanthan:
On the Initialization and Training Methods for Kohonen Self-Organizing Feature Maps in Color Image Quantization.
DELTA 2002: 321-325 |
| 16 | EE | C. S. Lim,
Saman S. Abeysekera,
Thambipillai Srikanthan,
S. K. Amarasinghe:
Multiple sequence families with efficient hardware architecture for use in spread spectrum watermarking.
ISCAS (1) 2002: 761-764 |
| 15 | | H. Tian,
Thambipillai Srikanthan,
Vijayan K. Asari:
A Hardware Efficient Technique for Rapid Lumen Segmentation from Endoscopic Images.
JCIS 2002: 716-719 |
| 14 | | Gurdeep S. Hura,
Sheeja Mohan,
Thambipillai Srikanthan:
Load Sharing in Large Scale Distributed Systems: A Novel Approach.
PDPTA 2002: 863-871 |
| 13 | EE | H. Tian,
Thambipillai Srikanthan,
Vijayan K. Asari,
Siew Kei Lam:
Study on the Effect of Object to Camera Distance on Polynomial Expansion Coefficients in Barrel Distortion Correction.
SSIAI 2002: 255-259 |
| 12 | EE | George Rosario Jagadeesh,
Thambipillai Srikanthan,
K. H. Quek:
Heuristic techniques for accelerating hierarchical routing on road networks.
IEEE Transactions on Intelligent Transportation Systems 3(4): 301-309 (2002) |
| 11 | EE | Thambipillai Srikanthan,
Bimal Gisuthan:
Optimizing Scaling Factor Computations in Flat Cordic.
Journal of Circuits, Systems, and Computers 11(1): 17-34 (2002) |
| 10 | EE | Siew Kei Lam,
Thambipillai Srikanthan:
Environment Modelling for Robot Navigation Using VLSI-Efficient Logarithmic Approximation Method.
Journal of Intelligent and Robotic Systems 35(1): 23-40 (2002) |
| 9 | EE | Thambipillai Srikanthan,
Bimal Gisuthan:
A novel technique for eliminating iterative based computation of polarity of micro-rotations in CORDIC based sine-cosine generators.
Microprocessors and Microsystems 26(5): 243-252 (2002) |
| 2001 |
|---|
| 8 | EE | H. Tian,
Thambipillai Srikanthan,
Vijayan K. Asari:
A Recursive Otsu-Iris Filter Technique for High-Speed Detection of Lumen Region from Endoscopic Images.
AIPR 2001: 182-186 |
| 7 | EE | Siew Kei Lam,
Thambipillai Srikanthan:
High-Speed Environment Representation Scheme for Dynamic Path Planning.
Journal of Intelligent and Robotic Systems 32(3): 307-319 (2001) |
| 6 | | Gurdeep S. Hura,
Thambipillai Srikanthan,
Chia Cher Yong:
Network Simulation Environment (NSE): A Generic Framework for Network Graphs.
Telecommunication Systems 17(1-2): 213-231 (2001) |
| 2000 |
|---|
| 5 | EE | Bimal Gisutham,
Thambipillai Srikanthan,
Vijayan K. Asari:
A High Speed Flat CORDIC Based Neuron with Multi-Level Activation Function for Robust Pattern Recognition.
CAMP 2000: 87-94 |
| 4 | EE | Siew Kei Lam,
Thambipillai Srikanthan:
Dynamic multicast routing in VLSI.
Computer Communications 23(11): 1055-1063 (2000) |
| 1998 |
|---|
| 3 | | Thambipillai Srikanthan,
Gurdeep S. Hura,
Chia Cher Yong:
An Object Oriented GUI for Clustering Technique Based Network Simulations.
ESM 1998: 92-96 |
| 2 | EE | S. K. Leong,
Thambipillai Srikanthan,
Gurdeep S. Hura:
An Internet application for on-line banking.
Computer Communications 20(16): 1534-1540 (1998) |
| 1997 |
|---|
| 1 | EE | Thambipillai Srikanthan,
Gurdeep S. Hura:
An efficient adaptive routing algorithm for a network management system.
Computer Communications 20(11): 988-998 (1997) |
