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De-Sheng Chen

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2007
10EEChang-Tzu Lin, Tai-Wei Kung, De-Sheng Chen, Yi-Wen Wang, Ching-Hwa Cheng: Noise-Aware Floorplanning for Fast Power Supply Network Design. ISCAS 2007: 2028-2031
2006
9EEChang-Tzu Lin, De-Sheng Chen, Yi-Wen Wang: Modern Floorplanning with Boundary and Fixed-outline Constraints via Genetic Clustering Algorithm. Journal of Circuits, Systems, and Computers 15(1): 107-128 (2006)
2005
8EEChang-Tzu Lin, De-Sheng Chen, Yi-Wen Wang, Hsin-Hsien Ho: Modem floorplanning with abutment and fixed-outline constraints. ISCAS (6) 2005: 6214-6217
2004
7EEChang-Tzu Lin, De-Sheng Chen, Yi-Wen Wang: Robust fixed-outline floorplanning through evolutionary search. ASP-DAC 2004: 42-44
6 Ching-Chung Hu, De-Sheng Chen, Yi-Wen Wang: Fast multilevel floorplanning for large scale modules. ISCAS (5) 2004: 205-208
2002
5EEChang-Tzu Lin, De-Sheng Chen, Yi-Wen Wang: GPE: A New Representation for VLSI Floorplan Problem. ICCD 2002: 42-44
2001
4EEZeng-Wei Hong, Jim-Min Lin, De-Sheng Chen, Hewijin Christine Jiau: DSIAS: A Software Architectural Style for Distributed Software Integration Systems. COMPSAC 2001: 291-296
1996
3EEDe-Sheng Chen, Majid Sarrafzadeh: An Exact Algorithm for Low Power Library-Specific Gate Re-Sizing. DAC 1996: 783-788
1995
2 De-Sheng Chen, Majid Sarrafzadeh, Gary K. H. Yeap: State Encoding of Finite State Machines for Low Power Design. ISCAS 1995: 2309-2312
1992
1EEDe-Sheng Chen, Majid Sarrafzadeh: A wire-length minimization algorithm for single-layer layouts. ICCAD 1992: 390-393

Coauthor Index

1Ching-Hwa Cheng [10]
2Hsin-Hsien Ho [8]
3Zeng-Wei Hong [4]
4Ching-Chung Hu [6]
5Hewijin Christine Jiau [4]
6Tai-Wei Kung [10]
7Chang-Tzu Lin [5] [7] [8] [9] [10]
8Jim-Min Lin [4]
9Majid Sarrafzadeh [1] [2] [3]
10Yi-Wen Wang [5] [6] [7] [8] [9] [10]
11Gary K. H. Yeap [2]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)