2004 |
4 | EE | Tetsuo Tada:
Opportunities with the open architecture test system.
ASP-DAC 2004: 343 |
3 | EE | Masaki Hashizume,
Daisuke Yoneda,
Hiroyuki Yotsuyanagi,
Tetsuo Tada,
Takeshi Koyama,
Ikuro Morita,
Takeomi Tamesada:
I_DDQ Test Method Based on Wavelet Transformation for Noisy Current Measurement Environment.
Asian Test Symposium 2004: 112-117 |
2001 |
2 | | Yoshihiro Nagura,
Michael Mullins,
Anthony Sauvageau,
Yoshinoro Fujiwara,
Katsuya Furue,
Ryuji Ohmura,
Tatsunori Komoike,
Takenori Okitaka,
Tetsushi Tanizaki,
Katsumi Dosaka,
Kazutami Arimoto,
Yukiyoshi Koda,
Tetsuo Tada:
Test cost reduction by at-speed BISR for embedded DRAMs.
ITC 2001: 182-187 |
1996 |
1 | | Narumi Sakashita,
Fumihiro Okuda,
Ken'ichi Shimomura,
Hiroki Shimano,
Mitsuhiro Hamada,
Tetsuo Tada,
Shinji Komori,
Kazuo Kyuma,
Akihiko Yasuoka,
Haruhiko Abe:
A Built-In Self-Test Circuit with Timing Margin Test Function in a 1Gbit Synchronous DRAM.
ITC 1996: 319-324 |