| 2006 |
|---|
| 7 | EE | Takashi Morimoto,
Hidekazu Adachi,
K. Yamaoka,
K. Awane,
Tetsushi Koide,
Hans Jürgen Mattausch:
An FPGA-Based Region-Growing Video Segmentation System with Boundary-Scan-Only LSI Architecture.
APCCAS 2006: 944-947 |
| 6 | EE | K. Yamaoka,
Takashi Morimoto,
Hidekazu Adachi,
Tetsushi Koide,
Hans Jürgen Mattausch:
Image segmentation and pattern matching based FPGA/ASIC implementation architecture of real-time object tracking.
ASP-DAC 2006: 176-181 |
| 5 | EE | K. Yamaoka,
Takashi Morimoto,
Hidekazu Adachi,
K. Awane,
Tetsushi Koide,
Hans Jürgen Mattausch:
Multi-object tracking VLSI architecture using image-scan based region growing and feature matching.
ISCAS 2006 |
| 4 | EE | Takashi Morimoto,
Hidekazu Adachi,
Osamu Kiriyama,
Tetsushi Koide,
Hans Jürgen Mattausch:
Boundary-Active-Only Adaptive Power-Reduction Scheme for Region-Growing Video-Segmentation.
IEICE Transactions 89-D(3): 1299-1302 (2006) |
| 2005 |
|---|
| 3 | EE | Takashi Morimoto,
Osamu Kiriyama,
Hidekazu Adachi,
Zhaomin Zhu,
Tetsushi Koide,
Hans Jürgen Mattausch:
A low-power video segmentation LSI with boundary-active-only architecture.
ASP-DAC 2005: 13-14 |
| 2 | EE | Takashi Morimoto,
Osamu Kiriyama,
Yohmei Harada,
Hidekazu Adachi,
Tetsushi Koide,
Hans Jürgen Mattausch:
Object tracking in video pictures based on image segmentation and pattern matching.
ISCAS (4) 2005: 3215-3218 |
| 2004 |
|---|
| 1 | EE | Takashi Morimoto,
Yohmei Harada,
Tetsushi Koide,
Hans Jürgen Mattausch:
350nm CMOS test-chip for architecture verification of real-time QVGA color-video segmentation at the 90nm technology node.
ASP-DAC 2004: 531-532 |
